ixtimesyncacc_p.h

有关ARM开发板上的IXP400网络驱动程序的源码以。

 * Macros to handle mutexes in functions other than InitCheck
 */

/* Lock Mutex Macro to be used by functions other than InitCheck */
#define IXP400_TIMESYNCACC_MUTEX_LOCK(tsMutex) \
do { \
    if (IX_SUCCESS != ixOsalMutexLock(&tsMutex, IX_OSAL_WAIT_FOREVER)) \
    { \
        return IX_TIMESYNCACC_FAILED;  \
    } /* end of if (IX_SUCCESS != ixOsalMutexLock(&tsMutex, IX_OSAL_WAIT_FOREVER)) */ \
} while (0) /* Don't include ';' here */

/* Unlock Mutex Macro to be used by functions other than InitCheck */
#define IXP400_TIMESYNCACC_MUTEX_UNLOCK(tsMutex) \
do { \
    if (IX_SUCCESS != ixOsalMutexUnlock(&tsMutex)) \
    { \
        return IX_TIMESYNCACC_FAILED;  \
    } /* end of if (IX_SUCCESS != ixOsalMutexUnlock(&tsMutex)) */ \
} while (0) /* Don't include ';' here */

/*
 * Macro to be used by InitCheck function
 */

/* Release Mutex Macro */
#define IXP400_TIMESYNCACC_MUTEX_RELEASE(tsMutex) \
do { \
    ixOsalMutexUnlock(&tsMutex);  \
    ixOsalMutexDestroy(&tsMutex); \
} while (0) /* Don't include ';' here */

/*
 * Typedefs used in this file
 */

/* Block Level Registers */
typedef struct
{
    UINT32 tsControl;   /* Time Sync Control */
    UINT32 tsEvent;     /* Time Sync Event */
    UINT32 tsAddend;    /* Addend */
    UINT32 tsAccum;     /* Accumulator */
    UINT32 tsSysTimeLo; /* SystemTime_Low */
    UINT32 tsSysTimeHi; /* SystemTime_High */
    UINT32 tsTrgtLo;    /* TargetTime_Low */
    UINT32 tsTrgtHi;    /* TargetTime_High */
    UINT32 tsASMSLo;    /* AuxSlaveModeSnap_Low */
    UINT32 tsASMSHi;    /* AuxSlaveModeSnap_High */
    UINT32 tsAMMSLo;    /* AuxMasterModeSnap_Low */
    UINT32 tsAMMSHi;    /* AuxMasterModeSnap_High */
} IxTimeSyncAccBlockLevelRegisters;

/* Port Level Registers */
typedef struct
{
    UINT32 tsChControl;  /* TS Channel Control */
    UINT32 tsChEvent;    /* TS Channel Event */
    UINT32 tsTxSnapLo;   /* XMIT Snaphot Low */
    UINT32 tsTxSnapHi;   /* XMIT Snapshot High */
    UINT32 tsRxSnapLo;   /* RECV Snapshot Low */
    UINT32 tsRxSnapHi;   /* RECV Snapshot High */
    UINT32 tsSrcUUIDLo;  /* SourceUUID Low */
    UINT32 tsSrcUUIDHi;  /* SequenceID0/SourceUUID High */
} IxTimeSyncAccPortLevelRegisters;

/* Virtual addresses of time sync hardware registers */
typedef struct
{
    /* Block Level Registers */
    IxTimeSyncAccBlockLevelRegisters  blRegisters;
    /* Port Level Registers */
    IxTimeSyncAccPortLevelRegisters   plRegisters[
        IXP400_TIMESYNCACC_MAX_1588PTP_PORT];
} IxTimeSyncAccRegisters;

/* NPE Identifiers */
typedef enum {
    IXP400_TIMESYNCACC_NPEA = 0,      /* NPE - A (PTP Port #0) */
    IXP400_TIMESYNCACC_NPEB,          /* NPE - B (PTP Port #1) */
    IXP400_TIMESYNCACC_NPEC,          /* NPE - C (PTP Port #2) */
    IXP400_TIMESYNCACC_NPE_UNKNOWN =  /* NPE - Unknown (Max PTP Port) */
        IXP400_TIMESYNCACC_MAX_1588PTP_PORT
} IxTimeSyncAccNpeId;

/* Initialisation Status */
typedef enum {
    IXP400_TIMESYNCACC_INIT_SUCCESS = IX_SUCCESS, /* Init successful */
    IXP400_TIMESYNCACC_INIT_FAIL    = IX_FAIL,    /* Init failed */
    IXP400_TIMESYNCACC_INIT_MUTEX_FAIL,       /* Fail to secure mutex */
    IXP400_TIMESYNCACC_INIT_TS_SUPPORT_FAIL,  /* TimeSync not supported */
    IXP400_TIMESYNCACC_INIT_TS_DISABLED_FAIL, /* TimeSync feature disabled */
    IXP400_TIMESYNCACC_INIT_ISR_BIND_FAIL,    /* ISR not installed */
    IXP400_TIMESYNCACC_INIT_MEM_ASGN_FAIL     /* Virtual mem assignment fail */
} IxTimeSyncAccInitStatus;

/*
 * Variable declarations global to TimeSync access component
 */

/* 1588 Hardware Assist enabled / disabled as found by Feature Control */
static BOOL ixTs1588HardwareAssistEnabled = FALSE;  /* Assume it is Disabled */

/* TimeSync Hardware Registers */
static IxTimeSyncAccRegisters ixTsRegisters;
/*
 * The array of NPE Enabled variables will be set to TRUE (enabled) or 
 * FALSE (disabled) of the NPE fused-out status with the help of the 
 * IxFeatureCtrlAcc component.
 */
static BOOL ixTsNpeEnabled[IXP400_TIMESYNCACC_MAX_1588PTP_PORT] =
{
    FALSE,  /* Assume NPE-A disabled */
    FALSE,  /* Assume NPE-B disabled */
    FALSE   /* Assume NPE-C disabled */
};

/*
 * Mutexes to protect
 * a) the system time from frequency scaling value change during the 
 *    client request to set system time.
 * b) initialisation sequence completion protection mechanism
 */
static  IxOsalMutex ixTsSysTimeMutex;      /* (a) */
static  IxOsalMutex ixTsInitChkMutex;      /* (b) */

/*
 * Client registered callback routines for 
 * a) the target time reached or exceeded interrupt notification
 * b) the auxiliary time stamps availability interrupt notification
 */
static IxTimeSyncAccTargetTimeCallback  ixTsTargetTimeCallback    = NULL; /*(a)*/
static IxTimeSyncAccAuxTimeCallback     ixTsAuxMasterTimeCallback = NULL; /*(b)*/
static IxTimeSyncAccAuxTimeCallback     ixTsAuxSlaveTimeCallback  = NULL; /*(b)*/

/*
 * The transmit and receive timestamp statistics 
 */
static IxTimeSyncAccStats ixTsStats = { 0,0 };


/*
 * Support functions declarations
 */

/* TimeSync Interrupt Service Routine declaration */
void
ixTimeSyncAccIsr(void);

/* Initialise the base address registers */
PRIVATE IX_STATUS
ixTimeSyncAccBlPlBaseAddressesSet (void);

/* Initialsation Check */
PRIVATE IxTimeSyncAccInitStatus
ixTimeSyncAccInitCheck (void);

PRIVATE IxTimeSyncAcc1588PTPPortMode
ixTimeSyncAccPTPPortModeGet(IxTimeSyncAcc1588PTPPort ptpPort);

/*
 * Local functions definitions.
 */

/*
 * ------------------------------------------------------------------ *
 * Block level configuration support functions definitions
 * ------------------------------------------------------------------ *
 */

/* Enable Auxiliary Master Mode Snapshot Interrupt */
PRIVATE IXP400_TIMESYNCACC_INLINE void
ixTimeSyncAccControlAmmsInterruptMaskSet(void)
{
    /* SET the amms bit */
    IXP400_TIMESYNCACC_BIT_SET(ixTsRegisters.blRegisters.tsControl,
                              IXP400_TIMESYNCACC_TSC_AMMS_MASK);
} /* end of ixTimeSyncAccControlAmmsInterruptMaskSet() function */

/* Enable Auxiliary Slave Mode Snapshot Interrupt */
PRIVATE IXP400_TIMESYNCACC_INLINE void
ixTimeSyncAccControlAsmsInterruptMaskSet(void)
{
    /* SET the asms bit */
    IXP400_TIMESYNCACC_BIT_SET(ixTsRegisters.blRegisters.tsControl,
                              IXP400_TIMESYNCACC_TSC_ASMS_MASK);
} /* end of ixTimeSyncAccControlAsmsInterruptMaskSet() function */

/* Enable Target Time Interrupt */
PRIVATE IXP400_TIMESYNCACC_INLINE void
ixTimeSyncAccControlTtmInterruptMaskSet(void)
{
    /* SET the ttm bit */
    IXP400_TIMESYNCACC_BIT_SET(ixTsRegisters.blRegisters.tsControl,
                               IXP400_TIMESYNCACC_TSC_TTM_MASK);
} /* end of ixTimeSyncAccControlTtmInterruptMaskSet() function */

/* Get Auxiliary Master Mode Snapshot Interrupt Mask value */
PRIVATE IXP400_TIMESYNCACC_INLINE BOOL 
ixTimeSyncAccControlAmmsInterruptMaskGet(void)
{
    /* Is the amms bit SET? */
    return IXP400_TIMESYNCACC_BIT_SET_CHECK(ixTsRegisters.blRegisters.tsControl,
                                            IXP400_TIMESYNCACC_TSC_AMMS_MASK);
} /* end of ixTimeSyncAccControlAmmsInterruptMaskGet() function */

/* Get Auxiliary Slave Mode Snapshot Interrupt  Mask value */
PRIVATE IXP400_TIMESYNCACC_INLINE BOOL
ixTimeSyncAccControlAsmsInterruptMaskGet(void)
{
    /* Is the asms bit SET? */
    return IXP400_TIMESYNCACC_BIT_SET_CHECK(ixTsRegisters.blRegisters.tsControl,
                                            IXP400_TIMESYNCACC_TSC_ASMS_MASK);
} /* end of ixTimeSyncAccControlAsmsInterruptMaskGet() function */

/* Get Target Time Interrupt Mask value */
PRIVATE IXP400_TIMESYNCACC_INLINE BOOL
ixTimeSyncAccControlTtmInterruptMaskGet(void)
{
    /* Is the ttm bit SET? */
    return IXP400_TIMESYNCACC_BIT_SET_CHECK(ixTsRegisters.blRegisters.tsControl,
                                            IXP400_TIMESYNCACC_TSC_TTM_MASK);
} /* end of ixTimeSyncAccControlTtmInterruptMaskGet() function */

/* Disable Auxiliary Master Mode Snapshot Interrupt */
PRIVATE IXP400_TIMESYNCACC_INLINE void
ixTimeSyncAccControlAmmsInterruptMaskClear(void)
{
    /* CLEAR the amms bit */
    IXP400_TIMESYNCACC_BIT_CLEAR(ixTsRegisters.blRegisters.tsControl,
                                 IXP400_TIMESYNCACC_TSC_AMMS_MASK);
} /* end of ixTimeSyncAccControlAmmsInterruptMaskClear() function */

/* Disable Auxiliary Slave Mode Snapshot Interrupt */
PRIVATE IXP400_TIMESYNCACC_INLINE void
ixTimeSyncAccControlAsmsInterruptMaskClear(void)
{
    /* CLEAR the asms bit */
    IXP400_TIMESYNCACC_BIT_CLEAR(ixTsRegisters.blRegisters.tsControl,
                                 IXP400_TIMESYNCACC_TSC_ASMS_MASK);
} /* end of ixTimeSyncAccControlAsmsInterruptMaskClear() function */

/* Disable Target Time Interrupt */
PRIVATE IXP400_TIMESYNCACC_INLINE void
ixTimeSyncAccControlTtmInterruptMaskClear(void)
{
    /* CLEAR the ttm bit */
    IXP400_TIMESYNCACC_BIT_CLEAR(ixTsRegisters.blRegisters.tsControl,
                                 IXP400_TIMESYNCACC_TSC_TTM_MASK);
} /* end of ixTimeSyncAccControlTtmInterruptMaskClear() function */

/* Reset Hardware Assist block */
PRIVATE IXP400_TIMESYNCACC_INLINE void
ixTimeSyncAccControlReset(void)
{
    /* SET the rst bit */
    IXP400_TIMESYNCACC_BIT_SET(ixTsRegisters.blRegisters.tsControl,
                               IXP400_TIMESYNCACC_TSC_RESET);
    /* CLEAR the rst bit */
    IXP400_TIMESYNCACC_BIT_CLEAR(ixTsRegisters.blRegisters.tsControl,
                                 IXP400_TIMESYNCACC_TSC_RESET);
} /* end of ixTimeSyncAccControlReset() function */

/* Poll for Auxiliary Master Mode Snapshot Captured event */
PRIVATE IXP400_TIMESYNCACC_INLINE BOOL 
ixTimeSyncAccEventAmmsFlagGet(void)
{
    /* Is the snm bit SET? */
    return IXP400_TIMESYNCACC_BIT_SET_CHECK(ixTsRegisters.blRegisters.tsEvent,
                                            IXP400_TIMESYNCACC_TSE_SNM);
} /* end of ixTimeSyncAccEventAmmsFlagGet() function */

/* Poll for Auxiliary Slave Mode Snapshot Captured event */
PRIVATE IXP400_TIMESYNCACC_INLINE BOOL
ixTimeSyncAccEventAsmsFlagGet(void)
{
    /* Is the sns bit SET? */
    return IXP400_TIMESYNCACC_BIT_SET_CHECK(ixTsRegisters.blRegisters.tsEvent,
                                            IXP400_TIMESYNCACC_TSE_SNS);
} /* end of ixTimeSyncAccEventAsmsFlagGet() function */

/* end of Poll for Target Time Reached event function */
PRIVATE IXP400_TIMESYNCACC_INLINE BOOL
ixTimeSyncAccEventTtmFlagGet(void)
{
    /* Is the ttipend bit SET? */
    return IXP400_TIMESYNCACC_BIT_SET_CHECK(ixTsRegisters.blRegisters.tsEvent,
                                            IXP400_TIMESYNCACC_TSE_TTIPEND);
} /* end of ixTimeSyncAccEventTtmFlagGet() function */

/* Clear Auxiliary Master Mode Snapshot Captured event */
PRIVATE IXP400_TIMESYNCACC_INLINE void
ixTimeSyncAccEventAmmsFlagClear(void)
{
    /* CLEAR the snm bit by writing '1' onto it */
    IXP400_TIMESYNCACC_BIT_SET(ixTsRegisters.blRegisters.tsEvent,