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📄 ixatmdtxcfginfo.c

📁 有关ARM开发板上的IXP400网络驱动程序的源码以。
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/*** @file ixAtmdTxCfgInfo.c* * @author Intel Corporation* @date 17 March 2002** @brief ATM TX data accessors** Access the data required to process  the TX traffic** Design Notes:*    Should run under the ixAtmdAccTxCfgIf lock* *  * @par * IXP400 SW Release version 2.1 *  * -- Copyright Notice -- *  * @par * Copyright (c) 2001-2005, Intel Corporation. * All rights reserved. *  * @par * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright *    notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright *    notice, this list of conditions and the following disclaimer in the *    documentation and/or other materials provided with the distribution. * 3. Neither the name of the Intel Corporation nor the names of its contributors *    may be used to endorse or promote products derived from this software *    without specific prior written permission. *  *  * @par * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. *  *  * @par * -- End of Copyright Notice --*//** Sytem defined include files*//** Put the user defined include files required.*/#include "IxOsal.h"#include "IxAtmdAccCtrl.h"#include "IxAtmdDefines_p.h"#include "IxAtmdAssert_p.h"#include "IxAtmdTxCfgInfo_p.h"#include "IxAtmdTxTransport_p.h"#include "IxAtmdPortMgmt_p.h"#include "IxAtmdDescMgmt_p.h"#include "IxAtmdUtil_p.h"#ifndef NDEBUGstatic unsigned int ixAtmdAccTxLowDefaultCallbackCount = 0;static unsigned int ixAtmdAccTxDoneDefaultCallbackCount = 0;#endif/* Function prototype */PRIVATE voidixAtmdAccTxLowDummyCallback (IxAtmLogicalPort port,                             unsigned int numberOfRemainingCells);PUBLIC IX_STATUSixAtmdAccTxDoneDummyCallback (unsigned int numberOfPdusToProcess,                              unsigned int *numberOfPdusProcessedPtr);/* --------------------------------------------------------* Tx notification default callback*/PRIVATE voidixAtmdAccTxLowDummyCallback (IxAtmLogicalPort port,                             unsigned int numberOfRemainingCells){    IX_ATMDACC_FULL_STATS(ixAtmdAccTxLowDefaultCallbackCount++; );}/* --------------------------------------------------------* Tx Done default callback*/PUBLIC IX_STATUSixAtmdAccTxDoneDummyCallback (unsigned int numberOfPdusToProcess,                              unsigned int *numberOfPdusProcessedPtr){    IX_ATMDACC_FULL_STATS( ixAtmdAccTxDoneDefaultCallbackCount++; );    return IX_FAIL;}/* ---------------------------------------------------------* basic initialisation entry point for tx*/IX_STATUSixAtmdAccTxCfgInfoInit (void){    unsigned int vc;    IxAtmLogicalPort portIndex;    unsigned int txQueueSize;    unsigned int numTxVcQueues;    IxQMgrQId txQueueId;    IX_STATUS returnStatus = IX_SUCCESS;    IX_STATUS qmgrStatus = IX_SUCCESS;    unsigned int totalTxQueueSize;    unsigned int averageTxQueueSize;    /* initialize the tx done buffer used during burstRead from tx done queue */    ixOsalMemSet(ixAtmdAccTxDoneDispatchBuffer, 0, sizeof(ixAtmdAccTxDoneDispatchBuffer));    /* initialise the data structures */    for (vc = 0; vc < IX_ATM_MAX_NUM_AAL_OAM_TX_VCS; vc++)    {        ixOsalMemSet (&ixAtmdAccTxVcDescriptor[vc], 0, sizeof (IxAtmdAccTxVcDescriptor));        ixAtmdAccTxVcDescriptor[vc].connId = IX_ATMDACC_TX_INVALID_CONNID;        ixAtmdAccTxVcDescriptor[vc].port   = NPE_INVALID_LOGICAL_PORT;        ixAtmdAccTxVcDescriptor[vc].vpi    = NPE_INVALID_VPI;        ixAtmdAccTxVcDescriptor[vc].vci    = NPE_INVALID_VCI;    } /* end of for(vc) */    for (portIndex = 0; portIndex < IX_UTOPIA_MAX_PORTS; portIndex++)    {        ixAtmdAccPortDescriptor[portIndex].txLowCallback    = ixAtmdAccTxLowDummyCallback;        ixAtmdAccPortDescriptor[portIndex].txQueueId        = IX_QMGR_QUEUE_INVALID;        ixAtmdAccPortDescriptor[portIndex].status           = IX_ATMDACC_PORT_DOWN;        ixAtmdAccPortDescriptor[portIndex].schDemandUpdate  = ixAtmdAccTxDummyDemandUpdate;        ixAtmdAccPortDescriptor[portIndex].schDemandClear   = ixAtmdAccTxDummyDemandClear;        ixAtmdAccPortDescriptor[portIndex].schVcIdGet       = ixAtmdAccTxDummyVcIdGet;        ixAtmdAccPortDescriptor[portIndex].txQueueSize      = IX_QMGR_Q_SIZE_INVALID;    } /* end of for(portIndex) */    /* set the default tx done handler */    numTxVcQueues = 0;    ixAtmdAccTxDoneDispatcher = ixAtmdAccTxDoneDispatch;    /* start detecting the configured tx vc queues */    totalTxQueueSize = 0;    for (portIndex = 0;        (qmgrStatus == IX_SUCCESS) &&        (portIndex < IX_UTOPIA_MAX_PORTS);        portIndex++)    {        txQueueId = portIndex + IX_NPE_A_QMQ_ATM_TX0;        qmgrStatus = ixQMgrQSizeInEntriesGet (txQueueId, &txQueueSize);        if(qmgrStatus == IX_SUCCESS)        {            /* set the queue size and the default queue threshold */            numTxVcQueues++;            ixAtmdAccPortDescriptor[portIndex].txQueueId = txQueueId;            ixAtmdAccPortDescriptor[portIndex].txQueueSize = txQueueSize;            totalTxQueueSize += txQueueSize;        }    } /* end of for(portIndex) */    if (numTxVcQueues > 0)    {    /* ensure the size of tx free queues is as expected.    * This is used to prevent a misconfiguration of the descriptor pool    */        averageTxQueueSize = totalTxQueueSize / numTxVcQueues;        /* no way to continue, the system configuration is wrong */        IX_ATMDACC_ABORT(averageTxQueueSize <= IX_ATMDACC_AVERAGE_TXVC_QUEUE_SIZE,            "IX_ATMDACC_AVERAGE_TXVC_QUEUE_SIZE not consistent with queue configuration");        returnStatus = ixAtmdAccPortMgmtNumTxVcQueuesSet (numTxVcQueues);    } /* end of if(numTxVcQueues) */    else    {        returnStatus = IX_FAIL;    } /* end of if-else(numTxVcQueues) */    return returnStatus;}/* ------------------------------------------------------------* reset all config params to initial state*/voidixAtmdAccTxCfgInfoStatsReset (void){    IX_ATMDACC_FULL_STATS(     ixAtmdAccTxLowDefaultCallbackCount = 0;    ixAtmdAccTxDoneDefaultCallbackCount = 0;    ixOsalMemSet (&ixAtmdAccTxTransportStats, 0, sizeof(ixAtmdAccTxTransportStats));    ixOsalMemSet (&ixAtmdAccTxDoneDispatchStats, 0, sizeof(ixAtmdAccTxDoneDispatchStats));    );}/* --------------------------------------------------------* check if the specific port, vpi, and vci is confifured*/BOOLixAtmdAccTxCfgVcConfigured (IxAtmLogicalPort port,                            unsigned int vpi,                            unsigned int vci){    /* assume that we will not find a match */    BOOL result = FALSE;    int vc;    /* iterate through the VCs searching for a match */    for (vc = 0; result == FALSE && vc < IX_ATM_MAX_NUM_AAL_OAM_TX_VCS; vc++)    {        /* only test used VCs */        if (IX_ATMDACC_TX_VC_INUSE (ixAtmdAccTxVcDescriptor[vc].connId))        {            /* check if it matches */            if (ixAtmdAccTxVcDescriptor[vc].vci == vci                && ixAtmdAccTxVcDescriptor[vc].vpi == vpi && ixAtmdAccTxVcDescriptor[vc].port == port)            {                /* yes, matched so return the connection Id */                result = TRUE;            }        } /* end of if(IX_ATMDACC_TX_VC_INUSE) */    } /* end of for(vc) */    return result;}/* ------------------------------------------------------* check if the specified port is idle*/BOOLixAtmdAccTxCfgPortVcsExist (IxAtmLogicalPort port){    BOOL result = FALSE;    int vc;    /* check if already existing */    for (vc = 0; !result && (vc < IX_ATM_MAX_NUM_AAL_OAM_TX_VCS); vc++)    {        if (IX_ATMDACC_TX_VC_INUSE (ixAtmdAccTxVcDescriptor[vc].connId))        {            if (ixAtmdAccTxVcDescriptor[vc].port == port)            {                result = TRUE;            }        }    } /* end of for(vc) */    return result;}/* ------------------------------------------------------* check if all connections are idle*/BOOLixAtmdAccTxCfgVcsExist (void){    BOOL result = FALSE;    int vc;    /* check if already existing */    for (vc = 0; !result && (vc < IX_ATM_MAX_NUM_AAL_OAM_TX_VCS); vc++)    {        if (IX_ATMDACC_TX_VC_INUSE (ixAtmdAccTxVcDescriptor[vc].connId))        {            result = TRUE;        }    }    return result;}/* ------------------------------------------------* Get a free AAL tx channel and allocate a new connection id*/IX_STATUSixAtmdAccTxCfgFreeChannelGet (IxAtmdAccAalType aalServiceType, IxAtmConnId * connIdPtr){/* assume that if we dont find any free tx descriptorsthen the system is overloaded    */    int txVc=0;    IX_STATUS returnStatus = IX_ATMDACC_BUSY;    switch( aalServiceType )    {    case IX_ATMDACC_AAL5:    case IX_ATMDACC_AAL0_48:    case IX_ATMDACC_AAL0_52:        /* iterate through the Tx descriptor table looking for a free entry */        txVc=0;        while (returnStatus != IX_SUCCESS && txVc < IX_ATM_MAX_NUM_AAL_VCS)        {            if (!IX_ATMDACC_TX_VC_INUSE (ixAtmdAccTxVcDescriptor[txVc].connId))            {                returnStatus = IX_SUCCESS;            }            else            {                /* this entry is not free so step on to the next */                txVc++;            } /* end of if-else(IX_ATMDACC_TX_VC_INUSE) */        } /* end of while(returnStatus) */        break;    case IX_ATMDACC_OAM:        txVc=IX_ATM_MAX_NUM_AAL_OAM_TX_VCS;        while (returnStatus != IX_SUCCESS &&                 --txVc >= IX_ATM_MAX_NUM_AAL_VCS)        {            if (!IX_ATMDACC_TX_VC_INUSE (ixAtmdAccTxVcDescriptor[txVc].connId))            {                returnStatus = IX_SUCCESS;            }        } /* end of while(returnStatus) */        break;    default:        /* Params are checked on API this should not happen */        IX_ATMDACC_ENSURE(0,"Bad service type");        break;    }    if( returnStatus == IX_SUCCESS )    {        IxAtmConnId newConnId = txVc + (ixAtmdAccUtilUniqueIdGet () * IX_ATM_MAX_NUM_AAL_OAM_TX_VCS);        *connIdPtr = newConnId;    }    return returnStatus;}/* --------------------------------------------------------*  initialise channel variables, allocate and initialise*  NPE descriptors for the transmit software queue.*/IX_STATUSixAtmdAccTxCfgChannelSet (IxAtmConnId connId,                          IxAtmSchedulerVcId schedulerVcId,                          IxAtmLogicalPort port,                          unsigned int vpi,                          unsigned int vci,                          IxAtmdAccAalType aalServiceType,                          IxAtmdAccUserId callbackId,                          IxAtmdAccTxVcBufferReturnCallback txDoneCallback){    unsigned int descCount;    UINT8 npeAalType = IX_NPE_A_AAL_TYPE_INVALID;    IX_STATUS returnStatus = IX_SUCCESS;    unsigned int txId;    IxAtmdAccTxVcDescriptor *vcDescriptor = NULL;    IX_ATMDACC_TX_QUEUE *txSwQueue = NULL;    IxAtmdAccPortDescriptor *portDescriptor = NULL;    unsigned int requiredSwQueueSize = 0;    unsigned int actualSwQueueSize = 0;    unsigned int cellSize = 0;    txId = IX_ATMDACC_TX_VC_INDEX_GET (connId);    vcDescriptor = &ixAtmdAccTxVcDescriptor[txId];    txSwQueue = &vcDescriptor->queue;    portDescriptor = &ixAtmdAccPortDescriptor[port];    /* default queue size for all service types, maybe overridden later */    requiredSwQueueSize = ((int)portDescriptor->txQueueSize - IX_ATMDACC_AVERAGE_TXVC_QUEUE_SIZE) + IX_ATMDACC_TX_SWQ_SIZE;    /* perform service specific operations */    /* convert the atmd service type to an Npe aalType */    /* set the cell size */    switch(aalServiceType)    {    case IX_ATMDACC_AAL5:        npeAalType = NPE_AAL5_TYPE;        cellSize = IX_ATM_CELL_PAYLOAD_SIZE;        break;    case IX_ATMDACC_AAL0_48:        npeAalType = NPE_AAL0_48_TYPE;        cellSize = IX_ATM_AAL0_48_CELL_PAYLOAD_SIZE;        break;    case IX_ATMDACC_AAL0_52:        npeAalType = NPE_AAL0_52_TYPE;        cellSize = IX_ATM_AAL0_52_CELL_SIZE_NO_HEC;        break;    case IX_ATMDACC_OAM:        npeAalType = NPE_OAM_TYPE;        cellSize = IX_ATM_AAL0_52_CELL_SIZE_NO_HEC;        requiredSwQueueSize = ((int)portDescriptor->txQueueSize - IX_ATMDACC_AVERAGE_TXVC_QUEUE_SIZE) + IX_ATMDACC_TX_OAM_SWQ_SIZE;        break;    default:        returnStatus = IX_FAIL;        break;    }    if( returnStatus == IX_SUCCESS )    {        /* Initialise the TX Queue */        IX_ATMDACC_TXQ_INIT(txSwQueue, requiredSwQueueSize,vcDescriptor->swQueueBuffer);        if(!IX_ATMDACC_TXQ_INITIALISED (txSwQueue))        {            returnStatus = IX_FAIL;        }        if (returnStatus == IX_SUCCESS)        {            /* discover what size queue was actually created for us,...            * it will be greater than or equal to what we requested            */            actualSwQueueSize = IX_ATMDACC_TXQ_SIZE(txSwQueue);            /* fill the parameters */            vcDescriptor->schedulerVcId = schedulerVcId;            vcDescriptor->connId = connId;            vcDescriptor->port = port;            vcDescriptor->vpi = vpi;            vcDescriptor->vci = vci;            vcDescriptor->npeAalType = npeAalType;            vcDescriptor->cellSize = cellSize;            vcDescriptor->callbackId = callbackId;            vcDescriptor->txDoneCallback = txDoneCallback;

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