ixatmdportmgmt.c

有关ARM开发板上的IXP400网络驱动程序的源码以。

    } /* end of if-else(numTxQueues) */

    return returnStatus;
}

/* ----------------------------------------------
*/
IX_STATUS
ixAtmdAccPortMgmtNumTxVcQueuesGet (unsigned int *numTxQueuesPtr)
{
    IX_STATUS returnStatus = IX_SUCCESS;

    if (numTxQueuesPtr == NULL)
    {
        returnStatus = IX_FAIL;
    }
    else
    {
        *numTxQueuesPtr = numTxVcQueues;
    } /* end of if-else(numTxQueuesPtr) */

    return returnStatus;
}

/* ----------------------------------------------
*/
BOOL
ixAtmdAccPortIsEnabled(IxAtmLogicalPort port)
{
    IX_STATUS retval;
    BOOL paramError;

    retval = ixAtmdAccPortStateQuery(port, IX_ATMD_PORT_ENABLED, &paramError);

    if ((retval != IX_SUCCESS) || (paramError))
    {
        return FALSE;
    }

    return TRUE;
}

/* ----------------------------------------------
*/
void
ixAtmdAccPortStateHandlersRegister(
                                   IxAtmdAccPortSetupNotifyHandler setupNotifyHandler,
                                   IxAtmdAccPortStateChangeHandler stateChangeHandler,
                                   IxAtmdAccPortStateQuery         enabledQuery,
                                   IxAtmdAccPortStateQuery         disabledQuery)
{
    setupNotify        = setupNotifyHandler;
    stateChangeRequest = stateChangeHandler;
    isEnabledQuery     = enabledQuery;
    isDisableComplete  = disabledQuery;
}



void
ixAtmdAccPortStateHandlersUnregister(void)
{
    setupNotify        = ixAtmdAccDummySetupNotifyHandler;
    stateChangeRequest = ixAtmdAccDummyStateChangeHandler;
    isEnabledQuery     = ixAtmdAccDummyStateQuery;
    isDisableComplete  = ixAtmdAccDummyStateQuery;
}



/* ----------------------------------------------
*/
BOOL
ixAtmdAccPortConfigured (IxAtmLogicalPort port)
{
    /* check if the port valid and is configured */
    BOOL result = (port >= IX_UTOPIA_PORT_0) &&
        (port < IX_UTOPIA_MAX_PORTS) &&
        ((unsigned int)port < numberOfPortsConfigured);

    return result;
}

/* ----------------------------------------------
*/
void
ixAtmdAccPortMgmtStatsShow (void)
{
    int port;

    if (ixAtmdAccPortMgmtInitDone)
    {
        printf("\n");
        for (port = 0; port < IX_UTOPIA_MAX_PORTS; port++)
        {
            printf("Port %d : state change requested %u times\n",
                port,
                portRequestStats[port]);
        }
    }
    printf("\n");
}

/* ----------------------------------------------
*/
void
ixAtmdAccPortMgmtStatsReset (void)
{
    ixOsalMemSet(portRequestStats, 0, sizeof(portRequestStats));
}

/* ----------------------------------------------
*/
void
ixAtmdAccUtopiaControlStatsShow (void)
{
    IxAtmdAccUtopiaStatus utStatus;

    if (ixAtmdAccPortMgmtInitDone)
    {
        ixAtmdAccUtopiaStatusGet (&utStatus);

        printf ("Utopia Data\n");
        printf ("           utTxCellCount ....... : %10u\n",
            (unsigned int) utStatus.utTxCellCount);
        printf ("           utTxIdleCellCount ... : %10u\n",
            (unsigned int) utStatus.utTxIdleCellCount);
        printf ("           txFIFO2Underflow .... : %10u\n",
            (unsigned int) utStatus.utTxCellConditionStatus.txFIFO2Underflow);
        printf ("           txFIFO1Underflow .... : %10u\n",
            (unsigned int) utStatus.utTxCellConditionStatus.txFIFO1Underflow);
        printf ("           txFIFO2Overflow ..... : %10u\n",
            (unsigned int) utStatus.utTxCellConditionStatus.txFIFO2Overflow);
        printf ("           txFIFO1Overflow ..... : %10u\n",
            (unsigned int) utStatus.utTxCellConditionStatus.txFIFO1Overflow);
        printf ("           txIdleCellCountOvr .. : %10u\n",
            (unsigned int) utStatus.utTxCellConditionStatus.txIdleCellCountOvr);
        printf ("           txCellCountOvr ...... : %10u\n",
            (unsigned int) utStatus.utTxCellConditionStatus.txCellCountOvr);
        printf ("           utRxCellCount ....... : %10u\n",
            (unsigned int) utStatus.utRxCellCount);
        printf ("           utRxIdleCellCount ... : %10u\n",
            (unsigned int) utStatus.utRxIdleCellCount);
        printf ("           utRxInvalidHECount .. : %10u\n",
            (unsigned int) utStatus.utRxInvalidHECount);
        printf ("           utRxInvalidParCount . : %10u\n",
            (unsigned int) utStatus.utRxInvalidParCount);
        printf ("           utRxInvalidSizeCount  : %10u\n",
            (unsigned int) utStatus.utRxInvalidSizeCount);
        printf ("           rxCellCountOvr ...... : %10u\n",
            (unsigned int) utStatus.utRxCellConditionStatus.rxCellCountOvr);
        printf ("           invalidHecCountOvr .. : %10u\n",
            (unsigned int) utStatus.utRxCellConditionStatus.invalidHecCountOvr);
        printf ("           invalidParCountOvr .. : %10u\n",
            (unsigned int) utStatus.utRxCellConditionStatus.invalidParCountOvr);
        printf ("           invalidSizeCountOvr . : %10u\n",
            (unsigned int) utStatus.utRxCellConditionStatus.invalidSizeCountOvr);
        printf ("           rxIdleCountOvr ...... : %10u\n",
            (unsigned int) utStatus.utRxCellConditionStatus.rxIdleCountOvr);
        printf ("           rxFIFO2Underflow .... : %10u\n",
            (unsigned int) utStatus.utRxCellConditionStatus.rxFIFO2Underflow);
        printf ("           rxFIFO1Underflow .... : %10u\n",
            (unsigned int) utStatus.utRxCellConditionStatus.rxFIFO1Underflow);
        printf ("           rxFIFO2Overflow ..... : %10u\n",
            (unsigned int) utStatus.utRxCellConditionStatus.rxFIFO2Overflow);
        printf ("           rxFIFO1Overflow ..... : %10u\n",
            (unsigned int) utStatus.utRxCellConditionStatus.rxFIFO1Overflow);
    }

    return;
}

/* ----------------------------------------------
*/
void
ixAtmdAccUtopiaControlStatsReset (void)
{
}

/* -----------------------------------------
* Functions visable in this file only
* ----------------------------------------- */
PRIVATE IX_STATUS
ixAtmdAccPortStateChange (IxAtmLogicalPort port, IxAtmdAccPortState newState)
{
    IX_STATUS returnStatus = IX_SUCCESS;

    /* Check parameters */
    if ((port < IX_UTOPIA_PORT_0)
        ||(port >= IX_UTOPIA_MAX_PORTS)
        || !ixAtmdAccPortConfigured(port))
    {
        returnStatus = IX_FAIL;
    }

    if (returnStatus == IX_SUCCESS)
    {
        IX_ATMDACC_PORTMGMT_LOCK_GET();

        /* Notify the interested party */
        returnStatus = stateChangeRequest(port, newState);

        /* update Stats */
        portRequestStats[port]++;

        IX_ATMDACC_PORTMGMT_LOCK_RELEASE ();
    } /* end of if(returnStatus) */
    return returnStatus;
}

/* ----------------------------------------------
*/
PRIVATE IX_STATUS
ixAtmdAccPortStateQuery (IxAtmLogicalPort port,
                         IxAtmdAccPortState state,
                         BOOL *paramError)
{
    IX_STATUS returnStatus = IX_SUCCESS;

    *paramError = FALSE;

    /* Check parameters */
    if ((port < IX_UTOPIA_PORT_0)
        ||(port >= IX_UTOPIA_MAX_PORTS)
        || !ixAtmdAccPortConfigured(port))
    {
        *paramError = TRUE;
        returnStatus = IX_SUCCESS;
    }
    else if ((state != IX_ATMD_PORT_ENABLED) &&
        (state != IX_ATMD_PORT_DISABLED))
    {
        *paramError = TRUE;
        returnStatus = IX_FAIL;
    }
    else if (returnStatus == IX_SUCCESS)
    {
        IX_ATMDACC_PORTMGMT_LOCK_GET();

        if (state == IX_ATMD_PORT_ENABLED)
        {
            if (!isEnabledQuery (port))
            {
                returnStatus = IX_FAIL;
            }
        }
        else
        {
            if (!isDisableComplete (port))
            {
                returnStatus = IX_FAIL;
            }
        } /* end of if-else(state) */

        IX_ATMDACC_PORTMGMT_LOCK_RELEASE();
    } /* end of if(returnStatus) */

    return returnStatus;
}

/* ----------------------------------------------
*/
PRIVATE IX_STATUS
ixAtmdAccDummyStateChangeHandler (IxAtmLogicalPort port,
                                  IxAtmdAccPortState newState)
{
    IX_ATMDACC_ENSURE(0, "PortMgmt No StateChange Handler Registered");
    return IX_FAIL;
}

/* ----------------------------------------------
*/
PRIVATE void
ixAtmdAccDummySetupNotifyHandler (unsigned int numPort)
{
    IX_ATMDACC_ENSURE(0, "PortMgmt No Setup Handler Registered");
}

/* ----------------------------------------------
*/
PRIVATE BOOL
ixAtmdAccDummyStateQuery (IxAtmLogicalPort port)
{
    IX_ATMDACC_ENSURE(0, "PortMgmt No State Check Registered");
    return FALSE;
}

/* ----------------------------------------------
* This function creates the big Endian utopia configration
* required by the NPE. Each 32 bit word represents a utopia
* co-processor register. The corresponding bitfields in the 
* supplied utopia config struct are shifted and ORed together.
* The constants below represent the bit offsets for the fields
* as defined by utopia co-processor hardware.
* These will never change and are used nowhere apart from in 
* this function.
*/
PRIVATE void ixAtmdAccUtopiaConfigGenerate(const IxAtmdAccUtopiaConfig *utConfig,
                                           UINT32 *configArrPtr )
{
        configArrPtr[0] = (UINT32)(  
	(utConfig->utTxConfig.reserved_1    << 31) |      
	(utConfig->utTxConfig.txInterface   << 30) |      
	(utConfig->utTxConfig.txMode        << 29) |      
	(utConfig->utTxConfig.txOctet       << 28) |      
	(utConfig->utTxConfig.txParity      << 27) |      
	(utConfig->utTxConfig.txEvenParity  << 26) |      
	(utConfig->utTxConfig.txHEC         << 25) |      
	(utConfig->utTxConfig.txCOSET       << 24) |      
	(utConfig->utTxConfig.reserved_2    << 23) |      
	(utConfig->utTxConfig.txCellSize    << 16) |      
	(utConfig->utTxConfig.reserved_3    << 13) |      
	(utConfig->utTxConfig.txAddrRange   << 8) |      
	(utConfig->utTxConfig.reserved_4    << 5) |      
	(utConfig->utTxConfig.txPHYAddr )      
        );

        configArrPtr[1] = (UINT32)(  
	(utConfig->utTxStatsConfig.vpi  << 20) |          
	(utConfig->utTxStatsConfig.vci  << 4) |          
	(utConfig->utTxStatsConfig.pti  << 1) |          
	(utConfig->utTxStatsConfig.clp )
        );

        configArrPtr[2] = (UINT32)(  
	(utConfig->utTxDefineIdle.vpi  << 20) |  
	(utConfig->utTxDefineIdle.vci  << 4) |  
	(utConfig->utTxDefineIdle.pti  << 1) |  
	(utConfig->utTxDefineIdle.clp )
        );
   
        configArrPtr[3] = (UINT32)(  
	(utConfig->utTxEnableFields.defineTxIdleGFC  << 31) |  
	(utConfig->utTxEnableFields.defineTxIdlePTI  << 30) |  
	(utConfig->utTxEnableFields.defineTxIdleCLP  << 29) |  
	(utConfig->utTxEnableFields.phyStatsTxEnb    << 28) |  
	(utConfig->utTxEnableFields.vcStatsTxEnb     << 27) |  
	(utConfig->utTxEnableFields.vcStatsTxGFC     << 26) |  
	(utConfig->utTxEnableFields.vcStatsTxPTI     << 25) |  
	(utConfig->utTxEnableFields.vcStatsTxCLP     << 24) |  
	(utConfig->utTxEnableFields.reserved_1       << 21) |  
	(utConfig->utTxEnableFields.txPollStsInt     << 20) |  
	(utConfig->utTxEnableFields.txCellOvrInt     << 19) |  
	(utConfig->utTxEnableFields.txIdleCellOvrInt << 18) |  
	(utConfig->utTxEnableFields.enbIdleCellCnt   << 17) |  
	(utConfig->utTxEnableFields.enbTxCellCnt     << 16) |  
	(utConfig->utTxEnableFields.reserved_2 )
        );

        configArrPtr[4] = (UINT32)(  
	(utConfig->utTxTransTable0.phy0       << 27) |  
	(utConfig->utTxTransTable0.phy1       << 22) |  
	(utConfig->utTxTransTable0.phy2       << 17) |  
	(utConfig->utTxTransTable0.reserved_1 << 16) |  
	(utConfig->utTxTransTable0.phy3       << 11) |  
	(utConfig->utTxTransTable0.phy4       << 6) |  
	(utConfig->utTxTransTable0.phy5       << 1) |  
	(utConfig->utTxTransTable0.reserved_2 )  
        );

        configArrPtr[5] = (UINT32)(  
	(utConfig->utTxTransTable1.phy6       << 27) |  
	(utConfig->utTxTransTable1.phy7       << 22) |  
	(utConfig->utTxTransTable1.phy8       << 17) |  
	(utConfig->utTxTransTable1.reserved_1 << 16) |  
	(utConfig->utTxTransTable1.phy9       << 11) |  
	(utConfig->utTxTransTable1.phy10      << 6) |  
	(utConfig->utTxTransTable1.phy11      << 1) |  
	(utConfig->utTxTransTable1.reserved_2 )  
        );

        configArrPtr[6] = (UINT32)(  
	(utConfig->utTxTransTable2.phy12 << 27) |  
	(utConfig->utTxTransTable2.phy13 << 22) |  
	(utConfig->utTxTransTable2.phy14 << 17) |  
	(utConfig->utTxTransTable2.reserved_1 << 16) |  
	(utConfig->utTxTransTable2.phy15 << 11) |  
	(utConfig->utTxTransTable2.phy16 << 6) |  
	(utConfig->utTxTransTable2.phy17 << 1) |  
	(utConfig->utTxTransTable2.reserved_2 )  
        );

        configArrPtr[7] = (UINT32)(  
	(utConfig->utTxTransTable3.phy18 << 27) |  
	(utConfig->utTxTransTable3.phy19 << 22) |  
	(utConfig->utTxTransTable3.phy20 << 17) |  
	(utConfig->utTxTransTable3.reserved_1 << 16) |  
	(utConfig->utTxTransTable3.phy21 << 11) |  
	(utConfig->utTxTransTable3.phy22 << 6) |  
	(utConfig->utTxTransTable3.phy23 << 1) |  
	(utConfig->utTxTransTable3.reserved_2 )  
        );

        configArrPtr[8] = (UINT32)(  
	(utConfig->utTxTransTable4.phy24 << 27) |  
	(utConfig->utTxTransTable4.phy25 << 22) |  
	(utConfig->utTxTransTable4.phy26 << 17) |  
	(utConfig->utTxTransTable4.reserved_1 << 16) |  
	(utConfig->utTxTransTable4.phy27 << 11) |  
	(utConfig->utTxTransTable4.phy28 << 6) |  
	(utConfig->utTxTransTable4.phy29 << 1) |  
	(utConfig->utTxTransTable4.reserved_2 )
        );

        configArrPtr[9] = (UINT32)(  
	(utConfig->utTxTransTable5.phy30 << 27) |  
	(utConfig->utTxTransTable5.reserved_1 )
        );              

        configArrPtr[10] = (UINT32)(  
	(utConfig->utRxConfig.rxInterface << 31) |  
	(utConfig->utRxConfig.rxMode << 30) |  
	(utConfig->utRxConfig.rxOctet << 29) |  
	(utConfig->utRxConfig.rxParity << 28) |  
	(utConfig->utRxConfig.rxEvenParity << 27) |  
	(utConfig->utRxConfig.rxHEC << 26) |  
	(utConfig->utRxConfig.rxCOSET << 25) |  
	(utConfig->utRxConfig.rxHECpass << 24) |