📄 ixatmdportmgmt.c
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/*** @file IxAtmdPortMgmt.c* * @author Intel Corporation* @date 17 March 2002** @brief ATM Port configuration and management* * * @par * IXP400 SW Release version 2.1 * * -- Copyright Notice -- * * @par * Copyright (c) 2001-2005, Intel Corporation. * All rights reserved. * * @par * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the Intel Corporation nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * * @par * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * * @par * -- End of Copyright Notice --*//** Sytem defined include files*//** User defined include files*/#include "IxOsal.h"#include "IxQMgr.h"#include "IxNpeMh.h"#include "IxAtmdAccCtrl.h"#include "IxAtmdDefines_p.h"#include "IxAtmdNpe_p.h"#include "IxAtmdAssert_p.h"#include "IxAtmdUtil_p.h"#include "IxAtmdPortMgmt_p.h"/** #defines*/#define NPE_RESP_REQ NPE_RESP_REQ_OFF#define IX_ATMDACC_PORTMGMT_LOCK_INIT() do{\ IX_STATUS returnStatus = IX_SUCCESS;\ IX_ATMDACC_ENSURE (ixAtmdAccPortMgmtInitDone == FALSE, "Initialisation Error");\ returnStatus = ixOsalMutexInit (&portLock);\ IX_ATMDACC_ENSURE (returnStatus == IX_SUCCESS, "Initialisation Error");\ } while(0)#define IX_ATMDACC_PORTMGMT_LOCK_GET() do{\ ixOsalMutexLock (&portLock, IX_OSAL_WAIT_FOREVER);\ } while(0)#define IX_ATMDACC_PORTMGMT_LOCK_RELEASE() do{\ ixOsalMutexUnlock (&portLock);\ } while(0)#define IX_ATMDACC_PORTMGMT_LOCK_DESTROY() do{\ ixOsalMutexDestroy (&portLock); \ } while(0)/* The npeResponse lock will serialise the excution of the functions* ixAtmdAccUtopiaStatusRead, ixAtmdAccUtopiaConfigRead and* ixAtmdAccUtopiaStatusRead with the IxNpeMh solicited callbacks.* Each of these functions will again call IX_ATMDACC_PORTMGMT_LOCK_GET and* block until the apropriate IxNpeMh solicited callback calls* IX_ATMDACC_PORTMGMT_LOCK_RELEASE.** NOTE: It would be more desirable if IxNpeMh provided an interface that would* block until the response message from the NPE was available and return this* message to the client instead of using the current callback mechanism.*/#define IX_ATMDACC_NPE_RESPONSE_LOCK_INIT() do{\ IX_STATUS returnStatus = IX_SUCCESS;\ IX_ATMDACC_ENSURE (ixAtmdAccPortMgmtInitDone == FALSE, "Initailisation Error");\ returnStatus = ixOsalMutexInit (&npeResponseLock);\ IX_ATMDACC_ENSURE (returnStatus == IX_SUCCESS, "Initailisation Error");\ IX_ATMDACC_NPE_RESPONSE_LOCK_GET ();\ } while(0)#define IX_ATMDACC_NPE_RESPONSE_LOCK_GET() do{\ ixOsalMutexLock (&npeResponseLock, IX_OSAL_WAIT_FOREVER);\ } while(0)#define IX_ATMDACC_NPE_RESPONSE_LOCK_RELEASE() do{\ ixOsalMutexUnlock (&npeResponseLock);\ } while(0)#define IX_ATMDACC_NPE_RESPONSE_LOCK_DESTROY() do{\ ixOsalMutexDestroy (&npeResponseLock); \ } while(0)/** Function prototypes.*/PRIVATE void ixAtmdAccDummySetupNotifyHandler (unsigned int numPort);PRIVATE IX_STATUS ixAtmdAccDummyStateChangeHandler (IxAtmLogicalPort port, IxAtmdAccPortState state);PRIVATE BOOL ixAtmdAccDummyStateQuery (IxAtmLogicalPort port);PRIVATE IX_STATUS ixAtmdAccPortStateQuery (IxAtmLogicalPort port, IxAtmdAccPortState state, BOOL *paramError);PRIVATE IX_STATUS ixAtmdAccPortStateChange (IxAtmLogicalPort port, IxAtmdAccPortState newState);PRIVATE IX_STATUS ixAtmdAccUtopiaConfigWrite (const IxAtmdAccUtopiaConfig *utConfig);PRIVATE IX_STATUS ixAtmdAccUtopiaConfigLoad (void);PRIVATE void ixAtmdAccUtopiaConfigLoadCallback (IxNpeMhNpeId npeMhNpeId, IxNpeMhMessage npeMhMessage);PRIVATE void ixAtmdAccUtopiaStatusUploadCallback (IxNpeMhNpeId npeMhNpeId, IxNpeMhMessage npeMhMessage);PRIVATE IX_STATUS ixAtmdAccUtopiaStatusUpload (void);PRIVATE IX_STATUS ixAtmdAccUtopiaStatusRead (IxAtmdAccUtopiaStatus* utStatus);PRIVATE BOOL ixAtmdAccUtopiaConfigSetParamsValidate (const IxAtmdAccUtopiaConfig *utConfig);PRIVATE void ixAtmdAccNpeStatusReadCallback (IxNpeMhNpeId npeMhNpeId, IxNpeMhMessage npeMhMessage);PRIVATE void ixAtmdAccUtopiaConfigGenerate(const IxAtmdAccUtopiaConfig *utConfig, UINT32 *configArrPtr );PRIVATE void ixAtmdAccNpeStatusGenerate(IxAtmdAccUtopiaStatus *statusStruct, UINT32 *status); /* * Variables Private To This File.*/static IxOsalMutex portLock;static IxOsalMutex npeResponseLock;static BOOL ixAtmdAccPortMgmtInitDone = FALSE;static IxAtmdAccPortSetupNotifyHandler setupNotify = ixAtmdAccDummySetupNotifyHandler;static IxAtmdAccPortStateChangeHandler stateChangeRequest = ixAtmdAccDummyStateChangeHandler;static IxAtmdAccPortStateQuery isEnabledQuery = ixAtmdAccDummyStateQuery;static IxAtmdAccPortStateQuery isDisableComplete = ixAtmdAccDummyStateQuery;static unsigned int numTxVcQueues; /**< number of Tx Vc queues in the system */static unsigned int numberOfPortsConfigured; /**< number of ports in the system */ /* * The following UINT32 variables are defined as volatile because they are accessed * from multiple threads. Declaring these as volatile indicates to the compiler that * these variables should not be placed in registers, which would result in incorrect * operation of the code. */static volatile UINT32 npeRespWordRead = 0;static volatile UINT32 npeRespOffsetRead = 0;static BOOL utopiaConfigSetDone = FALSE;static unsigned int portRequestStats[IX_UTOPIA_MAX_PORTS];/** Function implementations*//* -----------------------------------------* API functions* ----------------------------------------- */PUBLIC IX_STATUSixAtmdAccPortEnable(IxAtmLogicalPort port){ if (!ixAtmdAccPortMgmtInitDone) { return IX_FAIL; } else { return ixAtmdAccPortStateChange(port, IX_ATMD_PORT_ENABLED); }}/* ----------------------------------------------*/PUBLIC IX_STATUSixAtmdAccPortDisable(IxAtmLogicalPort port){ if (!ixAtmdAccPortMgmtInitDone) { return IX_FAIL; } else { return ixAtmdAccPortStateChange(port, IX_ATMD_PORT_DISABLED); }}/* ----------------------------------------------*/PUBLIC BOOLixAtmdAccPortDisableComplete(IxAtmLogicalPort port){ if (!ixAtmdAccPortMgmtInitDone) { return TRUE; } else { IX_STATUS retval; BOOL paramError; retval = ixAtmdAccPortStateQuery(port, IX_ATMD_PORT_DISABLED, ¶mError); if ((retval != IX_SUCCESS) || (paramError)) { return FALSE; } } return TRUE;}/* ----------------------------------------------*/PUBLIC IX_STATUSixAtmdAccUtopiaConfigSet (const IxAtmdAccUtopiaConfig *utConfig){ IX_STATUS returnStatus = IX_SUCCESS; if (!ixAtmdAccPortMgmtInitDone || utopiaConfigSetDone) { returnStatus = IX_FAIL; } if (returnStatus == IX_SUCCESS) { if (!ixAtmdAccUtopiaConfigSetParamsValidate (utConfig)) { returnStatus = IX_FAIL; } } if (returnStatus == IX_SUCCESS) { IX_ATMDACC_PORTMGMT_LOCK_GET (); returnStatus = ixAtmdAccUtopiaConfigWrite (utConfig); if (returnStatus == IX_SUCCESS) { returnStatus = ixAtmdAccUtopiaConfigLoad (); } if (returnStatus == IX_SUCCESS) { utopiaConfigSetDone = TRUE; numberOfPortsConfigured = utConfig->utTxConfig.txAddrRange + 1; setupNotify(numberOfPortsConfigured); } IX_ATMDACC_PORTMGMT_LOCK_RELEASE (); } /* end of if(returnStatus) */ return returnStatus;}PUBLIC IX_STATUSixAtmdAccUtopiaConfigReset (const IxAtmdAccUtopiaConfig *utConfig){ IX_STATUS returnStatus = IX_SUCCESS; /* Get the port management lock */ /* initialise configuration registers and write to NPE-A*/ IX_ATMDACC_PORTMGMT_LOCK_GET (); returnStatus = ixAtmdAccUtopiaConfigWrite (utConfig); if (IX_SUCCESS == returnStatus) { /* Load and get response from NPE-A */ returnStatus = ixAtmdAccUtopiaConfigLoad (); } if (IX_SUCCESS == returnStatus) { utopiaConfigSetDone = FALSE; } IX_ATMDACC_PORTMGMT_LOCK_RELEASE (); return returnStatus ;}/* ----------------------------------------------*/PUBLIC IX_STATUSixAtmdAccUtopiaStatusGet (IxAtmdAccUtopiaStatus* utStatus){ IX_STATUS returnStatus = IX_SUCCESS; if (!ixAtmdAccPortMgmtInitDone || utStatus == NULL) { returnStatus = IX_FAIL; } else { IX_ATMDACC_PORTMGMT_LOCK_GET (); /* Copy config & status registers from the Utopia coprocessor registers * to NPE memory */ returnStatus = ixAtmdAccUtopiaStatusUpload (); if (returnStatus == IX_SUCCESS) { /* Copy the status table from Npe memory to Xscale memory. * NOTE: This is a blocking call */ returnStatus = ixAtmdAccUtopiaStatusRead (utStatus); } IX_ATMDACC_PORTMGMT_LOCK_RELEASE (); } return returnStatus;}/* -----------------------------------------* Internal functions* ----------------------------------------- */IX_STATUSixAtmdAccPortMgmtInit (void){ IX_STATUS returnStatusVal = IX_SUCCESS; if (!ixAtmdAccPortMgmtInitDone) { utopiaConfigSetDone = FALSE; /* initialise internal lock */ IX_ATMDACC_PORTMGMT_LOCK_INIT (); IX_ATMDACC_NPE_RESPONSE_LOCK_INIT (); ixAtmdAccPortMgmtInitDone = TRUE; } /* end of if(ixAtmdAccPortMgmtInitDone) */ else { utopiaConfigSetDone = FALSE; returnStatusVal = IX_FAIL; } /* end of if-else(ixAtmdAccPortMgmtInitDone) */ return returnStatusVal;}/* ixAtmdAccPortMgmtUninit function */IX_STATUSixAtmdAccPortMgmtUninit (void){ IX_STATUS returnStatusVal = IX_SUCCESS; if (ixAtmdAccPortMgmtInitDone) { /* uninitialise internal lock */ IX_ATMDACC_NPE_RESPONSE_LOCK_DESTROY (); IX_ATMDACC_PORTMGMT_LOCK_DESTROY (); ixAtmdAccPortMgmtInitDone = FALSE; } /* end of if(ixAtmdAccPortMgmtInitDone) */ else { returnStatusVal = IX_FAIL; } /* end of if-else(ixAtmdAccPortMgmtInitDone) */ utopiaConfigSetDone = TRUE; return returnStatusVal;}/* ----------------------------------------------*/IX_STATUSixAtmdAccPortMgmtNumTxVcQueuesSet (unsigned int numTxQueues){ IX_STATUS returnStatus = IX_SUCCESS; /* Check that the number of transmit VC queues is valid */ if (numTxQueues > IX_UTOPIA_MAX_PORTS) { returnStatus = IX_FAIL; } else { numTxVcQueues = numTxQueues;
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