ixethacc.h

有关ARM开发板上的IXP400网络驱动程序的源码以。

 *     effects of @a ixEthAccPortMulticastAddressJoinAll()
 * @li @a ixEthAccPortMulticastAddressLeave() - unprovision a new 
 *     filtering address
 * @li @a ixEthAccPortMulticastAddressJoin() - provision a new 
 *     filtering address
 * @li @a ixEthAccPortPromiscuousModeSet() - all frames are 
 *     forwarded to the application regardless of the multicast 
 *     address provisioned
 * @li @a ixEthAccPortPromiscuousModeClear() - frames are forwarded 
 *     to the application following the multicast address provisioned
 *
 * In all cases, unicast and broadcast addresses are forwarded to 
 * the application.
 *
 * @li Reentrant    - yes
 * @li ISR Callable - no
 *
 * @param portId @ref IxEthAccPortId [in] - Ethernet port id.
 *
 * @return void
 *
 * <hr>
 */
PUBLIC IxEthAccStatus ixEthAccPortUnicastAddressShow(IxEthAccPortId portId);


/**
 * @ingroup IxEthAcc
 *
 * @fn ixEthAccPortMulticastAddressShow( IxEthAccPortId portId)
 *
 * @brief Displays multicast MAC address
 *
 * Displays multicast address which have been configured using @a ixEthAccMulticastAddressJoin
 * 
 * @li Reentrant    - yes
 * @li ISR Callable - no
 * 
 * @param portId @ref IxEthAccPortId [in] - Ethernet port id.
 *
 * @return void
 *
 * <hr>
 */
PUBLIC void ixEthAccPortMulticastAddressShow( IxEthAccPortId portId);

/**
 * @ingroup IxEthAcc
 *
 * @fn ixEthAccPortDuplexModeSet( IxEthAccPortId portId, IxEthAccDuplexMode mode )
 *
 * @brief  Set the duplex mode for the MAC.
 *
 * Configure the IXP400 MAC to either full or half duplex. 
 *
 * @note 
 * The configuration should match that provisioned on the PHY.
 *
 * @li Reentrant    - yes
 * @li ISR Callable - no
 *
 * @param portId @ref IxEthAccPortId [in]
 * @param mode @ref IxEthAccDuplexMode [in]
 *
 * @return IxEthAccStatus 
 * @li @a IX_ETH_ACC_SUCCESS 
 * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
 * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
 *
 * <hr>
 */
PUBLIC IxEthAccStatus 
ixEthAccPortDuplexModeSet(IxEthAccPortId portId,IxEthAccDuplexMode mode);

/**
 * @ingroup IxEthAcc
 *
 * @fn ixEthAccPortDuplexModeGet( IxEthAccPortId portId, IxEthAccDuplexMode *mode )
 *
 * @brief  Get the duplex mode for the MAC.
 *
 * return the duplex configuration of the IXP400 MAC.
 *
 * @note
 * The configuration should match that provisioned on the PHY.
 * See @a ixEthAccDuplexModeSet
 *
 * @li Reentrant    - yes
 * @li ISR Callable - no
 *
 * @param portId @ref IxEthAccPortId [in]
 * @param *mode @ref IxEthAccDuplexMode [out]
 *
 * @return IxEthAccStatus
 * @li @a IX_ETH_ACC_SUCCESS 
 * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
 * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
 *
 * <hr>
 *
 */
PUBLIC IxEthAccStatus 
ixEthAccPortDuplexModeGet(IxEthAccPortId portId,IxEthAccDuplexMode *mode );

/**
 * @ingroup IxEthAcc
 *
 * @fn ixEthAccPortTxFrameAppendPaddingEnable( IxEthAccPortId portId)
 *
 * @brief  Enable padding bytes to be appended to runt frames submitted to
 * this port
 * 
 * Enable up to 60 null-bytes padding bytes to be appended to runt frames 
 * submitted to this port. This is the default behavior of the access 
 * component.
 *
 * @warning Do not change this behaviour while the port is enabled.
 *
 * @note When Tx padding is enabled, Tx FCS generation is turned on
 *
 * @li Reentrant    - yes
 * @li ISR Callable - no
 *
 * @sa ixEthAccPortTxFrameAppendFCSDusable
 *
 * @param portId @ref IxEthAccPortId [in]
 *
 * @return IxEthAccStatus
 * @li @a IX_ETH_ACC_SUCCESS 
 * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
 * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
 *
 * <hr>
 */
PUBLIC IxEthAccStatus
ixEthAccPortTxFrameAppendPaddingEnable(IxEthAccPortId portId);

/**
 * @ingroup IxEthAcc
 *
 * @fn ixEthAccPortTxFrameAppendPaddingDisable( IxEthAccPortId portId)
 *
 * @brief  Disable padding bytes to be appended to runt frames submitted to
 * this port
 * 
 * Disable padding bytes to be appended to runt frames 
 * submitted to this port. This is not the default behavior of the access 
 * component.
 *
 * @warning Do not change this behaviour while the port is enabled.
 *
 * @li Reentrant    - yes
 * @li ISR Callable - no
 *
 * @param portId @ref IxEthAccPortId [in] 
 *
 * @return IxEthAccStatus
 * @li @a IX_ETH_ACC_SUCCESS 
 * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
 * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
 *
 * <hr>
 */
PUBLIC IxEthAccStatus
ixEthAccPortTxFrameAppendPaddingDisable(IxEthAccPortId portId);

/**
 * @ingroup IxEthAcc
 *
 * @fn ixEthAccPortTxFrameAppendFCSEnable( IxEthAccPortId portId)
 *
 * @brief  Enable the appending of Ethernet FCS to all frames submitted to this port
 * 
 * When enabled, the FCS is added to the submitted frames. This is the default 
 * behavior of the access component.
 * Do not change this behaviour while the port is enabled.
 *
 * @li Reentrant    - yes
 * @li ISR Callable - no
 *
 * @param portId @ref IxEthAccPortId [in] 
 *
 * @return IxEthAccStatus
 * @li @a IX_ETH_ACC_SUCCESS 
 * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
 * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
 *
 * <hr>
 */
PUBLIC IxEthAccStatus
ixEthAccPortTxFrameAppendFCSEnable(IxEthAccPortId portId);

/**
 * @ingroup IxEthAcc
 *
 * @fn ixEthAccPortTxFrameAppendFCSDisable( IxEthAccPortId portId)
 *
 * @brief  Disable the appending of Ethernet FCS to all frames submitted to this port.
 * 
 * When disabled, the Ethernet FCS is not added to the submitted frames. 
 * This is not the default
 * behavior of the access component.
 *
 * @note Since the FCS is not appended to the frame it is expected that the frame submitted to the 
 * component includes a valid FCS at the end of the data, although this will not be validated.
 *
 * The component shall forward the frame to the Ethernet MAC WITHOUT modification.
 *
 * Do not change this behaviour while the port is enabled.
 *
 * @note Tx FCS append is not disabled while Tx padding is enabled.
 *
 * @li Reentrant    - yes
 * @li ISR Callable - no
 *
 * @sa ixEthAccPortTxFrameAppendPaddingEnable
 *
 * @param portId @ref IxEthAccPortId [in] 
 *
 * @return IxEthAccStatus
 * @li @a IX_ETH_ACC_SUCCESS 
 * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
 * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
 *
 * <hr>
 */
PUBLIC IxEthAccStatus
ixEthAccPortTxFrameAppendFCSDisable(IxEthAccPortId portId);

/**
 * @ingroup IxEthAcc
 *
 * @fn ixEthAccPortRxFrameAppendFCSEnable( IxEthAccPortId portId)
 *
 * @brief Forward frames with FCS included in the receive buffer.
 *
 * The FCS is not striped from the receive buffer. 
 * The received frame length includes the FCS size (4 bytes). ie. 
 * A minimum sized ethernet frame shall have a length of 64bytes.
 *
 * Frame FCS validity checks are still carried out on all received frames.
 *
 * This is not the default
 * behavior of the access component.
 *
 * @li Reentrant    - yes
 * @li ISR Callable - no
 *
 * @param portId @ref IxEthAccPortId [in]
 *
 * @return IxEthAccStatus
 * @li @a IX_ETH_ACC_SUCCESS 
 * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
 * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
 *
 * <hr>
 */
PUBLIC IxEthAccStatus
ixEthAccPortRxFrameAppendFCSEnable(IxEthAccPortId portId);

/**
 * @ingroup IxEthAcc
 *
 * @fn ixEthAccPortRxFrameAppendFCSDisable( IxEthAccPortId portId)
 *
 * @brief  Do not forward the FCS portion of the received Ethernet frame to the user. 
 * The FCS is striped from the receive buffer. 
 * The received frame length does not include the FCS size (4 bytes).
 * Frame FCS validity checks are still carried out on all received frames.
 *
 * This is the default behavior of the component.
 * Do not change this behaviour while the port is enabled.
 *
 * @li Reentrant    - yes
 * @li ISR Callable - no
 *
 * @param portId @ref IxEthAccPortId [in]
 *
 * @return IxEthAccStatus
 * @li @a IX_ETH_ACC_SUCCESS 
 * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
 * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
 *
 * <hr>
 */
PUBLIC IxEthAccStatus
ixEthAccPortRxFrameAppendFCSDisable(IxEthAccPortId portId);




/**
 * @ingroup IxEthAcc
 *
 * @enum IxEthAccSchedulerDiscipline
 *
 * @brief  Definition for the port scheduling discipline
 *
 * Select the port scheduling discipline on receive and transmit path
 * @li FIFO : No Priority : In this configuration all frames are processed
 *                       in the access component in the strict order in which 
 *                        the component received them.
 * @li FIFO : Priority : This shall be a very simple priority mechanism. 
 *                     Higher prior-ity frames shall be forwarded 
 *                     before lower priority frames. There shall be no 
 *                     fairness mechanisms applied across different 
 *                     priorities. Higher priority frames could starve 
 *                     lower priority frames indefinitely.
 */
typedef  enum 
{
    FIFO_NO_PRIORITY, /**<frames submitted with no priority*/
    FIFO_PRIORITY /**<higher prority frames submitted before lower priority*/
}IxEthAccSchedulerDiscipline;

/**
 * @ingroup IxEthAcc
 *
 * @def IxEthAccTxSchedulerDiscipline
 *
 * @brief  Deprecated definition for the port transmit scheduling discipline
 */ 
#define IxEthAccTxSchedulerDiscipline IxEthAccSchedulerDiscipline



/**
 * @ingroup IxEthAcc
 *
 * @fn ixEthAccTxSchedulingDisciplineSet( IxEthAccPortId portId, IxEthAccSchedulerDiscipline sched)
 *
 * @brief Set the port scheduling to one of @a IxEthAccSchedulerDiscipline
 *
 * The default behavior of the component is @a FIFO_NO_PRIORITY.
 *
 * @li Reentrant    - yes
 * @li ISR Callable - no
 *
 * @pre
 *
 *
 * @param portId @ref IxEthAccPortId [in] 
 * @param sched @ref IxEthAccSchedulerDiscipline [in] 
 *
 * @return IxEthAccStatus
 * @li @a IX_ETH_ACC_SUCCESS : Set appropriate discipline.
 * @li @a IX_ETH_ACC_INVALID_ARG :  Invalid/unsupported discipline.
 * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
 * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
 *
 * <hr>
 */
PUBLIC IxEthAccStatus
ixEthAccTxSchedulingDisciplineSet(IxEthAccPortId portId, 
								  IxEthAccSchedulerDiscipline sched);


/**
 * @ingroup IxEthAcc
 *
 * @fn ixEthAccRxSchedulingDisciplineSet(IxEthAccSchedulerDiscipline sched)
 *
 * @brief Set the Rx scheduling to one of @a IxEthAccSchedulerDiscipline
 *
 * The default behavior of the component is @a FIFO_NO_PRIORITY.
 *
 * @li Reentrant    - yes
 * @li ISR Callable - no
 *
 * @pre
 *
 * @param sched : @a IxEthAccSchedulerDiscipline 
 *
 * @return IxEthAccStatus
 * @li @a IX_ETH_ACC_SUCCESS : Set appropriate discipline.
 * @li @a IX_ETH_ACC_FAIL :  Port is busy/priority scheduling not supported for A0.
 * @li @a IX_ETH_ACC_INVALID_ARG :  Invalid/unsupported discipline.
 *
 * <hr>
 */
PUBLIC IxEthAccStatus
ixEthAccRxSchedulingDisciplineSet(IxEthAccSchedulerDiscipline sched);

/**
 * @ingroup IxEthAcc
 *
 * @fn IxEthAccStatus ixEthAccNpeLoopbackEnable(IxEthAccPortId portId)
 *
 * @brief Enable NPE loopback
 *
 * When this loopback mode is enabled all the transmitted frames are
 * received on the same port, without payload.
 *
 * This function is recommended for power-up diagnostic checks and
 * should never be used under normal Ethernet traffic operations.
 *
 * @li Reentrant    - yes
 * @li ISR Callable - no
 *
 * @pre
 *
 * @note Calling ixEthAccPortDisable followed by ixEthAccPortEnable is
 * guaranteed to restore correct Ethernet