ixatmm.c

有关ARM开发板上的IXP400网络驱动程序的源码以。

/** 
 * @file    IxAtmm.c
 * @author Intel Corporation
 * @date    13-SEP-2000
 *
 * @brief   API of the IXP400 demo ATM Manager component (IxAtmm)
 * 
 * 
 * @par
 * IXP400 SW Release version 2.1
 * 
 * -- Copyright Notice --
 * 
 * @par
 * Copyright (c) 2001-2005, Intel Corporation.
 * All rights reserved.
 * 
 * @par
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the Intel Corporation nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 * 
 * 
 * @par
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 * 
 * 
 * @par
 * -- End of Copyright Notice --
 */

/*
 * Put the user defined include files required
 */
#include "IxOsal.h"
#include "IxAtmTypes.h"
#include "IxAtmm.h"
#include "IxAtmSch.h"
#include "IxAtmmUtopiaCfg_p.h"
#include "IxAtmmDataPath_p.h"
#include "IxFeatureCtrl.h"

/*
 * #defines and macros used in this file.
 */
#define IX_ATMM_MAX_NUM_VC_CHANGE_CBS   32
#define IX_ATMM_MAX_LOOPBACK_PORTS  1

#define IX_ATMM_BITS_PER_BYTE       8
#define IX_ATMM_BYTES_PER_ATM_CELL  53
#define IX_ATMM_BITS_PER_ATM_CELL   (IX_ATMM_BYTES_PER_ATM_CELL * IX_ATMM_BITS_PER_BYTE)

#define IX_ATMM_MIN_SCH_TABLE_CELLS 5

#define IX_ATMM_MAX_RX_TX_VCS  (IX_ATM_MAX_NUM_AAL_OAM_TX_VCS + IX_ATM_MAX_NUM_AAL_OAM_RX_VCS)

#define IX_ATMM_MAX_4UTOPIA_PORTS  4
#define IX_ATMM_MAX_8UTOPIA_PORTS  8
#define IX_ATMM_MAX_16UTOPIA_PORTS 16
#define IX_ATMM_MAX_24UTOPIA_PORTS 24

/*
 * Mutex macros
 */
#define IX_ATMM_LOCK()      (void)ixOsalMutexLock (&ixAtmmMutex, IX_OSAL_WAIT_FOREVER)
#define IX_ATMM_UNLOCK()    (void)ixOsalMutexUnlock (&ixAtmmMutex)
/*
 * Typedefs whose scope is limited to this file.
 */

/*
 * Port related info
 */
typedef struct
{
    BOOL initialized;
    unsigned txPortRate;
    unsigned rxPortRate;
} AtmmPortInfo;


/* AtmmVcInfo structure stores the current  attached VCs.
 * vcId 0 - (IX_ATM_MAX_NUM_AAL_OAM_TX_VCS - 1) represent  transmit VCs.  
 * vcId IX_ATM_MAX_NUM_AAL_OAM_TX_VCS - (IX_ATMM_MAX_RX_TX_VCS - 1) represent 
 * receive VCs.
 */
typedef struct
{
    BOOL inUse;
    IxAtmmVc vcData;
    IxAtmLogicalPort port;
} AtmmVcInfo;

/*
 * Variable declarations global to this file only. Externs are followed by
 * static variables.
 */
static IxOsalMutex ixAtmmMutex;
static BOOL ixAtmmInitDone = FALSE;

static IxAtmmVcChangeCallback vcChangeCbTable[IX_ATMM_MAX_NUM_VC_CHANGE_CBS];

static AtmmVcInfo ixAtmmVcInfo[IX_ATMM_MAX_RX_TX_VCS]; /* Tx + Rx */
static AtmmPortInfo ixAtmmPortInfo[IX_UTOPIA_MAX_PORTS];

/* N.B: Global to allow unit tests to reset */
BOOL ixAtmmUtopiaInitDone = FALSE;

/*
 * Function definitons
 */
PRIVATE void
clearTables (void);

PRIVATE BOOL
portValidate (IxAtmLogicalPort port);

PRIVATE IX_STATUS
checkVcNotAlreadyRegistered (IxAtmLogicalPort port, 
			     IxAtmmVc *vcDesc, 
			     IxAtmSchedulerVcId *vcId);

PRIVATE IX_STATUS
validateVC(IxAtmmVc *vcDesc);

PRIVATE IX_STATUS
setupTxVc (IxAtmLogicalPort port, IxAtmmVc *vcDesc, IxAtmSchedulerVcId *newVcId);

PRIVATE IX_STATUS
getRxVcId (IxAtmSchedulerVcId *newVcId);

PRIVATE void
callCallbacks (IxAtmmVcChangeEvent eventType, 
	       IxAtmLogicalPort port, 
	       IxAtmmVc *vcDesc);

/***********************************************************************
 * Function Name: clearTables
 * Parameters   : None
 * Description  : Initialises global data structures
 * Return Value : void
 ***********************************************************************/
PRIVATE void
clearTables (void)
{
    int i;

    /* Initialise all VCs to empty */
    for (i=0; i<IX_ATMM_MAX_RX_TX_VCS; i++)
    {
	ixAtmmVcInfo[i].inUse = FALSE;
    }

    /* Initialise VC Change table */
    for (i=0; i<IX_ATMM_MAX_NUM_VC_CHANGE_CBS; i++)
    {
	vcChangeCbTable[i] = NULL;
    }

    /* Initialize Port Init table */
    for (i=0; i<IX_UTOPIA_MAX_PORTS; i++)
    {
	ixAtmmPortInfo[i].initialized = FALSE;
    }
}

PRIVATE BOOL
portValidate (IxAtmLogicalPort port)
{
    if ((port < IX_UTOPIA_PORT_0) ||
	(port >= IX_UTOPIA_MAX_PORTS) || 
	!ixAtmmPortInfo[port].initialized)
    {
	return FALSE;
    }
    
    return TRUE;
}

PUBLIC IX_STATUS
ixAtmmInit (void)
{
    if (ixAtmmInitDone)
    {
	return IX_FAIL;
    }

    clearTables ();    

    /*
     * With this callback there is no circular dependancy
     * between the IxAtmm main component and the IxAtmmDataPath
     * sub component.
     */
    ixAtmmVcQueryCallbackRegister ( ixAtmmVcQuery );

    /* Initialize the mutex for the ixAtmmVcInfo & vcChange table */
    if (ixOsalMutexInit (&ixAtmmMutex) != IX_SUCCESS)
    {
	return IX_FAIL;
    }
    
    ixAtmmInitDone = TRUE;
    
    return IX_SUCCESS;
}


PUBLIC IX_STATUS
ixAtmmUninit (void)
{
    if (!ixAtmmInitDone)
    {
        return IX_SUCCESS;                 /* If Atmm not initialised */
    }

    /* Initialize the mutex for the ixAtmmVcInfo & vcChange table */
    if (ixOsalMutexDestroy (&ixAtmmMutex) != IX_SUCCESS)
    {
                                        /* Destroy the mutex object initialised by IxAtmmInit*/
        return IX_FAIL;                 /* The caller should ensure that no thread is */
                                        /* blocking on this mutex */
    }
    ixAtmmVcQueryCallbackUnregister ();  /* Unregister the vcQueryCallback */
    clearTables ();                      /* Clear all the tables- also done during initialisation */

    ixAtmmInitDone = FALSE;             /* Set Initdone flag to false */

    return IX_SUCCESS;
}



PUBLIC IX_STATUS
ixAtmmUtopiaInit (unsigned numPorts,
		  IxAtmmPhyMode phyMode,
		  IxAtmmPortCfg portCfgs[],
		  IxAtmmUtopiaLoopbackMode loopbackMode)
{
    IX_STATUS retval;
    IxFeatureCtrlReg ctrlRegister;

    if (!ixAtmmInitDone)
    {
	return IX_FAIL;
    }

    /* Check is already configured */
    if (ixAtmmUtopiaInitDone)
    {
	return IX_ATMM_RET_ALREADY_INITIALIZED;
    }

    /* Check silicon type. 
     * Do not perform feature checkings only if
     * IXP42X - A0 silicon. 
     */
    if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 != 
        (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK))
        || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ()))
    {
	/* Read the hardware capability register */
	ctrlRegister = ixFeatureCtrlHwCapabilityRead(); 

	/* Shift 16bits to the left and mask for bit 16 and 17 */
	ctrlRegister = (ctrlRegister >> IX_FEATURECTRL_UTOPIA_PHY_LIMIT) & 0x3; 
	
	switch(ctrlRegister)
	{
	    case IX_FEATURECTRL_REG_UTOPIA_32PHY:
		/* Verify the numPort is valid */
		/* Note: Currently can support only 24 utopia ports */
		if (numPorts > IX_ATMM_MAX_24UTOPIA_PORTS)
		{
		    printf("Unable to support more than 24 ports\n");
		    return IX_FAIL;
		}
		break;
	    case IX_FEATURECTRL_REG_UTOPIA_16PHY:
		/* Verify the numPort is valid */
		if (numPorts > IX_ATMM_MAX_16UTOPIA_PORTS)
		{
		    printf("Unable to support more than 16 ports\n");
		    return IX_FAIL;
		}
		break;
	    case IX_FEATURECTRL_REG_UTOPIA_8PHY:
		/* Verify the numPort is valid */
		if (numPorts > IX_ATMM_MAX_8UTOPIA_PORTS)
		{
		    printf("Unable to support more than 8 ports\n");
		    return IX_FAIL;
		}
		break;
	    case IX_FEATURECTRL_REG_UTOPIA_4PHY:
		/* Verify the numPort is valid */
		if (numPorts > IX_ATMM_MAX_4UTOPIA_PORTS)
		{
		    printf("Unable to support more than 4 ports\n");
		    return IX_FAIL;
		}
		break;
	    default:
		printf("Invalid Control Register value\n");
		return IX_FAIL;
	}
    }

    retval = ixAtmmUtopiaCfgInit (numPorts, phyMode, portCfgs, loopbackMode);

    if (retval == IX_SUCCESS)
    {
	ixAtmmUtopiaInitDone = TRUE;
    }

    return retval;
}


PUBLIC IX_STATUS
ixAtmmUtopiaUninit (void)
{
    IX_STATUS retval;

    if (!ixAtmmInitDone)
    {
        return IX_FAIL;
    }

    /* Check if already uninitialised */
    if (!ixAtmmUtopiaInitDone)
    {
        return IX_FAIL;
    }
    /* Call the UtopiaCfgUninit function*/
    retval = ixAtmmUtopiaCfgUninit ();

    if (IX_SUCCESS == retval)
    {
    /* Change flag to FALSE on finishing uninitialising */
        ixAtmmUtopiaInitDone = FALSE;
    }
    return retval;
}




PUBLIC IX_STATUS
ixAtmmPortInitialize (IxAtmLogicalPort port, 
		      unsigned txPortRate, 
		      unsigned rxPortRate)
{
    IX_STATUS retval;
    unsigned portRateCells;

    /* Should only happen after UTOPIA init */
    if (!ixAtmmUtopiaInitDone)
    {
	return IX_FAIL;
    }

    /* Check input parameters */
    if ((port < IX_UTOPIA_PORT_0) || (port >= IX_UTOPIA_MAX_PORTS))
    {
	return IX_ATMM_RET_INVALID_PORT;
    }
    
    if ((txPortRate == 0) || (rxPortRate == 0))
    {
	return IX_FAIL;
    }
    
    if (ixAtmmPortInfo[port].initialized)
    {
	return IX_ATMM_RET_ALREADY_INITIALIZED;
    }
    
    /* Initialise AtmSch with the transmit port rate (cells per second) */
    portRateCells = (unsigned) txPortRate / IX_ATMM_BITS_PER_ATM_CELL;
    
    /* Setup the scheduler for this port
     * Min cells to schedule is over the Q low threshold
     * so that schedule tables generated is big enough to push
     * the Tx Q over the theshold
     */
    retval = ixAtmSchPortModelInitialize (port, 
					  portRateCells,
					  IX_ATMM_MIN_SCH_TABLE_CELLS);

    if (retval != IX_SUCCESS)
    {
	/*
	 * N.B. Not rolling back run time init
	 */
	return IX_FAIL;
    }

    /* 
     * Do run time initialization of ATMM 
     * This will check if run time init has occurred already
     * etc.
     */
    retval = ixAtmmDataPathSetup (port);
    if (retval != IX_SUCCESS)
         
    {
	return IX_FAIL;
    }

    ixAtmmPortInfo[port].txPortRate = txPortRate;
    ixAtmmPortInfo[port].rxPortRate = rxPortRate;
    ixAtmmPortInfo[port].initialized = TRUE;
    
    return IX_SUCCESS;
}



PUBLIC IX_STATUS
ixAtmmPortUninitialize (IxAtmLogicalPort port)
{
    IX_STATUS retval;

    /* Should only happen while UTOPIA is initialised */
    if (!ixAtmmUtopiaInitDone)
    {
        return IX_FAIL;
    }

   /* Check input parameters */
    if ((IX_UTOPIA_PORT_0 > port) || (IX_UTOPIA_MAX_PORTS <= port))
    {
        return IX_ATMM_RET_INVALID_PORT;
    }

    /* Uninitialise the data path */
    retval = ixAtmmDataPathUninit (port);
    if (IX_SUCCESS != retval)

    {
        return IX_FAIL;
    }

    /* Uninitialise Port*/
    retval= ixAtmSchPortModelUninitialize(port);

    if (IX_SUCCESS != retval)
    {
        return IX_FAIL;
    }

    ixAtmmPortInfo[port].initialized = FALSE;

    return IX_SUCCESS;
}



PUBLIC IX_STATUS
ixAtmmPortQuery (IxAtmLogicalPort port, 
		 unsigned *txPortRate, 
		 unsigned *rxPortRate)
{