ixdmaacc_p.h

有关ARM开发板上的IXP400网络驱动程序的源码以。

/**
 * @file IxDmaAcc_p.h
 *
 * @date 18 October 2002
 *
 * @brief Descriptor pool access, initialise and allocation for DMA access layer
 *
 * @par
 * IXP400 SW Release version 2.1
 * 
 * -- Copyright Notice --
 * 
 * @par
 * Copyright (c) 2001-2005, Intel Corporation.
 * All rights reserved.
 * 
 * @par
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the Intel Corporation nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 * 
 * 
 * @par
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 * 
 * 
 * @par
 * -- End of Copyright Notice --
 */

#ifndef IXDMAACC_P_H
#define IXDMAACC_P_H

#include "IxQMgr.h"
#include "IxQueueAssignments.h"

#define IX_DMA_MAX_TRANSFER_LENGTH 65535  /**< Maximum length for Dma transfer
                                           */
#define IX_DMA_MAX_REQUEST           16   /**< Maximum number of entries in the
                                               descriptor pool */
#define IX_DMA_CALLBACK_ID_DMADONE    0   /**< Callback Id for Dma Done
                                           */
/**
* @brief Masks for Dma Transfer Mode
*/
/**
* @def IX_DMA_MODE_INC_INC
* @brief Mask for Addressing Mode
*        Bit 28 : Source Increment Mode = 0
*        Bit 20 : Destination Increment Mode = 0
*                       31       23       15        7      0
*                        |--x---- |--x---- |------- |------|
*           Binary       00000000 00000000 00000000 00000000
*            Hex              00       00       00      00
*/
#define IX_DMA_MODE_INC_INC  0x00000000

/**
* @def IX_DMA_MODE_INC_FIX
* @brief Mask for Addressing Mode
*        Bit 28 : Source Increment Mode  = 0
*        Bit 20 : Destination Fixed Mode = 1
*                       31       23       15        7      0
*                        |--x---- |--x---- |------- |------|
*           Binary       00000000 00010000 00000000 00000000
*            Hex              00       10       00      00
*/
#define IX_DMA_MODE_INC_FIX  0x00100000

/**
* @def IX_DMA_MODE_FIX_INC
* @brief Mask for Addressing Mode
*        Bit 28 : Source Increment Mode = 1
*        Bit 20 : Destination Fixed Mode = 0
*                       31       23       15        7      0
*                        |--x---- |--x---- |------- |------|
*           Binary       00010000 00000000 00000000 00000000
*            Hex              10       00       00      00
*/
#define IX_DMA_MODE_FIX_INC  0x10000000

/**
* @def IX_DMA_MODE_FIX_FIX
* @brief Mask for Addressing Mode
*        Bit 28 : Source Increment Mode = 1
*        Bit 20 : Destination Fixed Mode = 1
*                       31       23       15        7      0
*                        |--x---- |--x---- |------- |------|
*           Binary       00010000 00010000 00000000 00000000
*            Hex              10       10       00      00
*/
#define IX_DMA_MODE_FIX_FIX  0x10100000

/**
* @def IX_DMA_MODE_COPY_CLEAR
* @brief Mask for Transfer Mode Copy and Clear Source
*        Bit 19,27   = 0
*        Bit 18,26   = 0
*                       31       23       15        7      0
*                        |---xx-- |---xx-- |------- |------|
*           Binary       00000000 00000000 00000000 00000000
*            Hex              00       00       00      00
*/
#define IX_DMA_MODE_COPY_CLEAR  0x00000000

/**
* @def IX_DMA_MODE_COPY
* @brief Mask for Transfer Mode Copy only
*        Bit 19,27   = 0
*        Bit 18,26   = 1
*                       31       23       15        7      0
*                        |---xx-- |---xx-- |------- |------|
*           Binary       00000100 00000100 00000000 00000000
*            Hex              04       04       00      00
*/
#define IX_DMA_MODE_COPY  0x04040000

/*
* @def IX_DMA_MODE_COPY_BYTE_SWAP
* @brief Mask for Transfer Mode Copy and Byte Swap
*        Bit 19,27   = 1
*        Bit 18,26   = 0
*                       31       23       15        7      0
*                        |---xx-- |---xx-- |------- |------|
*           Binary       00001000 00001000 00000000 00000000
*            Hex              08       08       00      00
*/
#define IX_DMA_MODE_COPY_BYTE_SWAP  0x08080000

/*
* @def IX_DMA_MODE_COPY_REVERSE
* @brief Mask for Transfer Mode Copy and Byte Reverse
*        Bit 19,27   = 1
*        Bit 18,26   = 1
*                       31       23       15        7      0
*                        |---xx-- |---xx-- |------- |------|
*           Binary       00001100 00001100 00000000 00000000
*            Hex              0C       0C       00      00
*/
#define IX_DMA_MODE_COPY_REVERSE  0x0C0C0000

/*
* @def IX_DMA_MODE_TRANSWIDTH_32_32
* @brief Mask for Transfer Width
*        Bit 25,24 Source 32 bits      = 1,1
*        Bit 17,16 Destination 32 bits = 1,1
*                       31       23       15        7      0
*                        |-----xx |-----xx |------- |------|
*           Binary       00000011 00000011 00000000 00000000
*            Hex              03       03       00      00
*/
#define IX_DMA_MODE_TRANSWIDTH_32_32   0x03030000

/*
* @def IX_DMA_MODE_TRANSWIDTH_32_16
* @brief Mask for Transfer Width
*        Bit 25,24 Source 32 bits      = 1,1
*        Bit 17,16 Destination 16 bits = 1,0
*                       31       23       15        7      0
*                        |-----xx |-----xx |------- |------|
*           Binary       00000011 00000010 00000000 00000000
*            Hex              03       02       00      00
*/
#define IX_DMA_MODE_TRANSWIDTH_32_16   0x03020000

/*
* @def IX_DMA_MODE_TRANSWIDTH_32_8
* @brief Mask for Transfer Width
*        Bit 25,24 Source 32 bits     = 1,1
*        Bit 17,16 Destination 8 bits = 0,1
*                       31       23       15        7      0
*                        |-----xx |-----xx |------- |------|
*           Binary       00000011 00000001 00000000 00000000
*            Hex              03       01       00      00
*/
#define IX_DMA_MODE_TRANSWIDTH_32_8    0x03010000

/*
* @def IX_DMA_MODE_TRANSWIDTH_16_32
* @brief Mask for Transfer Width
*        Bit 25,24 Source 16 bits      = 1,0
*        Bit 17,16 Destination 32 bits = 1,1
*                       31       23       15        7      0
*                        |-----xx |-----xx |------- |------|
*           Binary       00000010 00000011 00000000 00000000
*            Hex              02       03       00      00
*/
#define IX_DMA_MODE_TRANSWIDTH_16_32   0x02030000

/*
* @def IX_DMA_MODE_TRANSWIDTH_16_16
* @brief Mask for Transfer Width
*        Bit 25,24 Source 16 bits      = 1,0
*        Bit 17,16 Destination 16 bits = 1,0
*                       31       23       15        7      0
*                        |-----xx |-----xx |------- |------|
*           Binary       00000010 00000010 00000000 00000000
*            Hex              02       02       00      00
*/
#define IX_DMA_MODE_TRANSWIDTH_16_16   0x02020000

/*
* @def IX_DMA_MODE_TRANSWIDTH_16_8
* @brief Mask for Transfer Width
*        Bit 25,24 Source 16 bits      = 1,0
*        Bit 17,16 Destination 8 bits = 0,1
*                       31       23       15        7      0
*                        |-----xx |-----xx |------- |------|
*           Binary       00000010 00000001 00000000 00000000
*            Hex              02       01       00      00
*/
#define IX_DMA_MODE_TRANSWIDTH_16_8    0x02010000

/*
* @def IX_DMA_MODE_TRANSWIDTH_8_32
* @brief Mask for Transfer Width
*        Bit 25,24 Source 8 bits      = 0,1
*        Bit 17,16 Destination 32 bits = 1,1
*                       31       23       15        7      0
*                        |-----xx |-----xx |------- |------|
*           Binary       00000001 00000011 00000000 00000000
*            Hex              01       03       00      00
*/
#define IX_DMA_MODE_TRANSWIDTH_8_32    0x01030000

/*
* @def IX_DMA_MODE_TRANSWIDTH_8_16
* @brief Mask for Transfer Width
*        Bit 25,24 Source 8 bits      = 0,1
*        Bit 17,16 Destination 16 bits = 1,0
*                       31       23       15        7      0
*                        |-----xx |-----xx |------- |------|
*           Binary       00000001 00000010 00000000 00000000
*            Hex              01       02       00      00
*/

#define IX_DMA_MODE_TRANSWIDTH_8_16    0x01020000

/*
* @def IX_DMA_MODE_TRANSWIDTH_8_8
* @brief Mask for Transfer Width
*        Bit 25,24 Source 8 bits      = 0,1
*        Bit 17,16 Destination 8 bits = 0,1
*                       31       23       15        7      0
*                        |-----xx |-----xx |------- |------|
*           Binary       00000001 00000001 00000000 00000000
*            Hex              01       01       00      00
*/
#define IX_DMA_MODE_TRANSWIDTH_8_8    0x01010000

/*
* @def IX_DMA_MODE_TRANSWIDTH_32_BURST
* @brief Mask for Transfer Width
*        Bit 25,24 Source 32 bits      = 1,1
*        Bit 17,16 Destination Burst = 0,0
*                       31       23       15        7      0
*                        |-----xx |-----xx |------- |------|