ixdmaacc.c

有关ARM开发板上的IXP400网络驱动程序的源码以。

    return(IX_DMA_SUCCESS);
} /* end of function ixDmaAccDmaTransfer */

/***********************************************************************
 * @fn ixDmaShow
 * @param None
 * @brief Display component information for statistics purposes
 * @return IX_SUCCESS : Notification that statistics show is succesful
 * @return IX_FAIL    : Statistics show not succesful
 ***********************************************************************/
PUBLIC IX_STATUS
ixDmaAccShow(void)
{
    IX_STATUS status; /* Status to return to client for DmaAccShow */
    /* Return FAIL if initialization has not been done */
    if(ixDmaAccInitDone)
    {
        /* Show descriptor pool statistics */
        ixDmaAccDescPoolShow();
        /* Show Dma transfer Statistics */
        printf ("\n\nNumber of successful dma requests         : %d \n",
                dmaStats.successCnt);
        printf ("Number of unsuccessful dma requests       : %d \n",
                dmaStats.failCnt);
        /* Show Q Statistics */
        printf ("Number of times Dma Req Q overflow        : %d \n",
                dmaStats.qOverflowCnt);
        printf ("Number of times Dma Done Q underflow      : %d \n",
                dmaStats.qUnderflowCnt);
        printf ("Number of invalid Q descriptors submitted : %d \n",
                dmaStats.qDescAddrInvalidCnt);
        status = IX_SUCCESS;
    }
    else
    {
        printf("\nDma Show : Dma access driver not initialized");
        status = IX_FAIL;
    } /* end of if(ixDmaAccInitDone) */
    return status;
} /* end of function ixDmaAccShow */


/***********************************************************************
 * @fn ixDmaTransferDoneCallback
 * @param  QId :  Queue Identifier for Dma done
 * @param  cbId : Callback Identifier for Dma done
                  (this parameter is not used)
 * @brief This callback is registered with the queue manager for
 *        notification of Dma transfer done event
 *        Q manager calls this function when Queue is Not Empty
 *
 * @return none
 *
 ***********************************************************************/
void
ixDmaTransferDoneCallback(
    IxQMgrQId qId,
    IxQMgrCallbackId cbId )
{
    UINT32 qEntry;                               /* Temporary variable for
                                                    pointer to descriptor */
    IxDmaNpeQDescriptor *descriptorPtr;          /* Temporary variable for
                                                    pointer to descriptor */
    IxDmaReturnStatus status = IX_DMA_FAIL;      /* Default return status is
                                                    FAIL */
    /* Read the queue to get the descriptor */
    if ( IX_SUCCESS != ixQMgrQRead ( ixDmaQIdDmaDone, &qEntry ) )
    {
        /* increase the counter */
        dmaStats.qUnderflowCnt++;
        /* Descriptor failed to read from dma done queue */
        ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
        		   IX_OSAL_LOG_DEV_STDERR,
            	   "\nixDmaTransferDoneCallback : failed to read descriptor "
            	   "pointer from Dma Done Q.",
            	   0,0,0,0,0,0);
        return;
    }

    /* Load descriptor from the Dma Done queue to temporary descriptor pointer */
    descriptorPtr = (IxDmaNpeQDescriptor *)
                    IX_OSAL_MMU_PHYS_TO_VIRT(qEntry);
    if ( NULL != descriptorPtr)
    {
        /* Refresh the cache for descriptor obtained */
        IX_OSAL_CACHE_INVALIDATE (descriptorPtr,
                                  sizeof (IxDmaNpeQDescriptor));

        /* Check for error condition in the above descriptor : examine
           operationMode parameter */
        if ( descriptorPtr->operationMode == 0 )
        {
           /* Increment counter for number of requests completed
            * but operation failed
            */
           dmaStats.failCnt++;
           /* Dma transfer failed */
           ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
           			  IX_OSAL_LOG_DEV_STDERR,
                      "\nixDmaTransferDoneCallback : dma transfer failed.",
                      0,0,0,0,0,0);
           status = IX_DMA_FAIL;
        }
        else
        {
           status = IX_DMA_SUCCESS;
        }  /* end of if (descriptorPtr->operationMode) */

        /* Free above descriptor from the buffer pool : the oldest descriptor
           in the pool */
        if( IX_DMA_DM_SUCCESS != ixDmaAccDescriptorFree(descriptorPtr) )
        {
            /* Log error message in debugging mode */
            ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
            		   IX_OSAL_LOG_DEV_STDERR,
                       "\nixDmaTransferDoneCallback : descriptor free failed.",
                       0,0,0,0,0,0);
            status = IX_DMA_FAIL;
            /* Call the callback with the Error Condition returned by the NPE */
            descriptorPtr->pDmaCallback( status );
            return;
        }
    }
    else
    {
        /* Increment counter for Q descriptor address received as NULL
         */
        dmaStats.qDescAddrInvalidCnt++;
        /* Log error message in debugging mode */
        ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
        		   IX_OSAL_LOG_DEV_STDERR,
                   "\nixDmaTransferDoneCallback : Illegal descriptor returned "
                   "by DMA Done Q.",
                   0,0,0,0,0,0);
        status = IX_DMA_FAIL;
    }
    /* Call the callback with the Error Condition returned by the NPE */
    descriptorPtr->pDmaCallback( status );
    return;
} /* end of ixDmaTransferDoneCallback */

/***********************************************************************
 * @fn ixDmaAccParamsValidate
 * @param None
 * @brief Validate parameters provided for Dma transfer
 * @return IX_SUCCESS : Validation succesful
 * @return IX_FAIL    : Validation failed
 ***********************************************************************/
IxDmaReturnStatus
ixDmaAccParamsValidate(
                        UINT32 sourceAddr,
                        UINT32 destinationAddr,
                        UINT16 transferLength,
                        IxDmaTransferMode transferMode,
                        IxDmaAddressingMode addressingMode,
                        IxDmaTransferWidth transferWidth)
{
    /* Check : source address is word aligned
     *         A mask of value Hex 0x03 (binary 0x0011)
     *         is used to determine if Destination address is
     *         a multiple of 4.
     *         This must be true for ByteSwap or Byte Reverse Transfer Mode
     *         to be valid.
     */
    if ( (0x00 != (sourceAddr & 0x03)) &&
         ( (IX_DMA_COPY_BYTE_SWAP == transferMode)||
           (IX_DMA_COPY_REVERSE == transferMode) ) )
    {
        /* Log error message in debugging mode */
        ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
        		   IX_OSAL_LOG_DEV_STDERR,
        		   "\nixDmaAccParamsValidate : Dma Source address is not "
        		   "aligned for Byte Swap or Byte Reverse Modes.",
        		   0,0,0,0,0,0);
       return (IX_DMA_FAIL);
    }  /* end of if(sourceAddr) */

    /* Check : destination address word aligned
     *         A mask of value Hex 0x03 (binary 0x0011)
     *         is used to determine if Destination address is
     *         a multiple of 4.
     *         This must be true for ByteSwap or Byte Reverse Transfer Mode
     *         to be valid.
     */
    if ( ( 0x00 != (destinationAddr & 0x03)) &&
         ( (IX_DMA_COPY_BYTE_SWAP == transferMode)||
           (IX_DMA_COPY_REVERSE == transferMode) ) )
    {
        /* Log error message in debugging mode */
        ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
        		   IX_OSAL_LOG_DEV_STDERR,
        		   "\nixDmaAccParamsValidate : Dma Destination address not "
        		   "word aligned for Byte Swap or Byte Reverse Modes.",
        		   0,0,0,0,0,0);
        return (IX_DMA_FAIL);
    }  /* end of if(destinationAddr) */

    /* Check : Addressing Mode validation
    Note : Fixed Source to Fixed Destination is not valid
    */

    if ( addressingMode >= IX_DMA_FIX_SRC_FIX_DST )
    {
        /* Log error message in debugging mode */
        ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
        		   IX_OSAL_LOG_DEV_STDERR,
                   "\nixDmaAccParamsValidate : Dma addressing mode not valid.",
                   0,0,0,0,0,0);
        return IX_DMA_INVALID_ADDRESS_MODE;
    }  /* end of if(AddresingMode) */

    /* Check : Transfer Mode validation */
    if ( transferMode >= IX_DMA_TRANSFER_MODE_INVALID )
    {
        /* Log error message in debugging mode */
        ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
        		   IX_OSAL_LOG_DEV_STDERR,
                   "\nixDmaAccParamsValidate : Dma transfer mode not valid.",
                   0,0,0,0,0,0);
        return IX_DMA_INVALID_TRANSFER_MODE;
    }  /* end of if(transferMode) */

    /* Check : transfer length range check*/
    if (0 == transferLength)
    {
        /* Log error message in debugging mode */
        ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
        		   IX_OSAL_LOG_DEV_STDERR,
                   "\nixDmaAccParamsValidate : Invalid Dma Transfer length.",
                   0,0,0,0,0,0);
       return IX_DMA_INVALID_TRANSFER_LENGTH;
    } /* end of if(transferLength) */

    /* Check : Transfer Width Validation
     *         A mask of value Hex 0x03 (binary 0x0011)
     *         is used to determine if Transfer Length is
     *         a multiple of 4.
     *         This must be true for 32 bit Transfer Widths
     *         to be valid.
     */

    if ( ( (IX_DMA_32_SRC_32_DST == transferWidth)||
           (IX_DMA_32_SRC_16_DST == transferWidth)||
           (IX_DMA_32_SRC_8_DST == transferWidth)||
           (IX_DMA_16_SRC_32_DST == transferWidth)||
           (IX_DMA_8_SRC_32_DST == transferWidth)||
           (IX_DMA_32_SRC_BURST_DST == transferWidth)||
           (IX_DMA_BURST_SRC_32_DST == transferWidth) )
           && (0x00 != (transferLength & 0x03)) )
    {
        /* Log error message in debugging mode */
        ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
        		   IX_OSAL_LOG_DEV_STDERR,
        		   "\nixDmaAccParamsValidate : Dma transfer length is not "
        		   "4 byte multiple for 32 bit transfer mode.",
        		   0,0,0,0,0,0);
        return IX_DMA_INVALID_TRANSFER_WIDTH;
    } /* end of if(transferWidth) */

    /* Check : Transfer width validation
     *         A mask of value Hex 0x01 (binary 0x0001)
     *         is used to determine if Transfer Length is
     *         a multiple of 2.
     *         This must be true for 16 bit Transfer Widths
     *         to be valid.
     */

    if ( ( (IX_DMA_16_SRC_16_DST == transferWidth)||
           (IX_DMA_16_SRC_8_DST == transferWidth)||
           (IX_DMA_8_SRC_16_DST == transferWidth)||
           (IX_DMA_16_SRC_BURST_DST == transferWidth)||
           (IX_DMA_BURST_SRC_16_DST == transferWidth) )
           && (0x0 != (transferLength & 0x1)) )
    {
        /* Log error message in debugging mode */
        ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
        		   IX_OSAL_LOG_DEV_STDERR,
        		   "\nixDmaAccParamsValidate : Dma transfer length is not "
        		   "2 byte multiple for 16 bit transfer mode.",
        		   0,0,0,0,0,0);
        return IX_DMA_INVALID_TRANSFER_WIDTH;
    } /* end of if(transferWidth) */

    /* Check : Transfer width validation
     *         Reject the following illegal case
     *         AddressMode=IncSrc_FixedDest and Transfer Width == xx_Burst
     */

    if ( ( (IX_DMA_32_SRC_BURST_DST == transferWidth)||
           (IX_DMA_16_SRC_BURST_DST == transferWidth)||
           (IX_DMA_8_SRC_BURST_DST == transferWidth)||
           (IX_DMA_BURST_SRC_BURST_DST == transferWidth) )
           && (IX_DMA_INC_SRC_FIX_DST==addressingMode) )
    {
        /* Log error message in debugging mode */
        ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
        		   IX_OSAL_LOG_DEV_STDERR,
        		   "\nixDmaAccParamsValidate : Burst destination not supported "
        		   "in Inc Source to Fixed Dest Address Mode.",
        		   0,0,0,0,0,0);
        return IX_DMA_INVALID_TRANSFER_WIDTH;
    } /* end of if(transferWidth) */
    /* Check : Transfer width validation
     *         Reject the following illegal case
     *         AddressMode=FixedSrc_IncDest and Transfer Width == Burst_xx
     */

    if ( ( (IX_DMA_BURST_SRC_32_DST == transferWidth)||
           (IX_DMA_BURST_SRC_16_DST == transferWidth)||
           (IX_DMA_BURST_SRC_8_DST == transferWidth)||
           (IX_DMA_BURST_SRC_BURST_DST == transferWidth) )
           && (IX_DMA_FIX_SRC_INC_DST==addressingMode) )
    {
        /* Log error message in debugging mode */
        ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
        		   IX_OSAL_LOG_DEV_STDERR,
        		   "\nixDmaAccParamsValidate : Burst source not supported "
        		   "in Fixed Src and Inc Dest Address Mode.",
        		   0,0,0,0,0,0);
        return IX_DMA_INVALID_TRANSFER_WIDTH;
    } /* end of if(transferWidth) */
    return (IX_DMA_SUCCESS);
} /* end of function ixDmaAccParamsValidate */