📄 ixdmaacccodelet.c
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/** * @file IxDmaAccCodelet.c * * @author Intel Corporation * @date 18 November 2002 * * @brief This file contains the implementation of the Dma Access Codelet. * * * @par * IXP400 SW Release version 2.1 * * -- Copyright Notice -- * * @par * Copyright (c) 2001-2005, Intel Corporation. * All rights reserved. * * @par * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the Intel Corporation nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * * @par * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * * @par * -- End of Copyright Notice --*//* * System defined include files. *//* * User defined include files. */#include "IxOsal.h"#include "IxQMgr.h"#include "IxNpeDl.h"#include "IxDmaAcc.h"#include "IxDmaAccCodelet.h"#include "IxDmaAccCodelet_p.h"/* * Defines *//* Sleep timer is set to 1ms */#define IX_CLIENT_SLEEP_IN_MS 1/* XScale tick is 66MHz */#define IX_DMA_CODELET_XSCALE_TICK 66/* Decimal point */#define IX_DMA_CODELET_DECIMAL_POINT 3/* 8 bits in a byte */#define IX_DMA_CODELET_EIGHT_BITS 8/* Max limit for CallBack time out */#define IX_DMA_CODELET_MAX_TIME_OUT 10000/* * Variable declarations global to this file only. */static BOOL ixDmaAccCodeletInitialised = FALSE;static IxOsalThread ixDmaAccCodeletDispatchId;static UINT8 *ixDmaAccCodeletSrcBlock; /**< Pointer to memory allocation for storing DMA source test patterns */static UINT8 *ixDmaAccCodeletDestBlock; /**< Pointer to memory allocation for storing DMA destination test patterns *//* Check to see whether CallBack is returned */BOOL ixDmaAccCodeletCallBackReturnFlag = FALSE;/* Counter used for stop timer */UINT32 ixDmaAccCodeletLoopCount = 0;/* Structure to store start and stop time of PERFORMANCE_NUM_LOOP (i.e. 100 runs) */IxDmaAccCodeletTimeStore ixDmaAccCodeletTimeStore;/* Used to check the status of the callback */IX_STATUS ixDmaAccCodeletCallBackStatus;/* Messages for DmaTransfer Modes */char *ixDmaAccCodeletMsgTM[] = { "IX_DMA_COPY_CLEAR ", "IX_DMA_COPY ", "IX_DMA_COPY_BYTE_SWAP ", "IX_DMA_COPY_REVERSE "};/* Messages for DmaAddress Modes */char *ixDmaAccCodeletMsgAM[] = { "INC SRC INC DEST ", "INC SRC FIX DEST ", "FIX SRC INC DEST "};/* Messages for DmaTransfer Widths */char *ixDmaAccCodeletMsgTW[] = { "IX_DMA_32_SRC_32_DST ", "IX_DMA_32_SRC_16_DST ", "IX_DMA_32_SRC_8_DST ", "IX_DMA_16_SRC_32_DST ", "IX_DMA_16_SRC_16_DST ", "IX_DMA_16_SRC_8_DST ", "IX_DMA_8_SRC_32_DST ", "IX_DMA_8_SRC_16_DST ", "IX_DMA_8_SRC_8_DST ", "IX_DMA_8_SRC_BURST_DST ", "IX_DMA_16_SRC_BURST_DST ", "IX_DMA_32_SRC_BURST_DST ", "IX_DMA_BURST_SRC_8_DST ", "IX_DMA_BURST_SRC_16_DST ", "IX_DMA_BURST_SRC_32_DST ", "IX_DMA_BURST_SRC_BURST_DST "};/* * Static function prototypes. */PRIVATE void ixDmaAccCodeletShow(void);PRIVATE void ixDmaAccCodeletTestPatternReset(void);PRIVATE void ixDmaAccCodeletDispatcherPoll(void* argUnused, void** ptrRetObjUnused);PRIVATE IX_STATUS ixDmaAccCodeletDispatcherStart(BOOL useInterrupt);PRIVATE IX_STATUS ixDmaAccCodeletNpeInit(IxNpeDlNpeId npeId);PRIVATE void ixDmaAccCodeletCallback(IX_STATUS status);PRIVATE IxQMgrDispatcherFuncPtr ixDmaAccCodeletDispatcherFunc ;PRIVATE void ixDmaAccCodeletReportAverageTime(UINT16 tLength);PRIVATE void ratioPrintf (int decimalPoint, UINT64 param1, UINT64 param2);/* * Function definition: ixDmaAccCodeletInit() * See header file for documentation. */IX_STATUS ixDmaAccCodeletInit(IxNpeDlNpeId npeId){ UINT32 counter; /* Block reinitialisation if already done so */ if(ixDmaAccCodeletInitialised) { printf("\nDma codelet already initialised"); return(IX_FAIL); } /* get the memory for source area */ ixDmaAccCodeletSrcBlock = (UINT8*) IX_OSAL_CACHE_DMA_MALLOC(IX_DMA_CODELET_TEST_MAXLENGTH); /* get the memory for destination area */ ixDmaAccCodeletDestBlock = (UINT8*) IX_OSAL_CACHE_DMA_MALLOC(IX_DMA_CODELET_TEST_MAXLENGTH); /* Initialise Queue Manager */ printf("\nInitialising Queue Manager..."); if (ixQMgrInit() != IX_SUCCESS) { printf("\nError initialising queue manager!"); return (IX_FAIL); } /* Start the Queue Manager dispatcher loop : Parameter is TRUE for Interrupt mode else poll mode */#ifdef __linux if(ixDmaAccCodeletDispatcherStart(TRUE) != IX_SUCCESS)#else if(ixDmaAccCodeletDispatcherStart(FALSE) != IX_SUCCESS)#endif { printf("\nError starting queue manager dispatch loop!"); return (IX_FAIL); } /* Initialise NPE and download Image */ printf("\nInitialising NPE %d...", npeId); if(ixDmaAccCodeletNpeInit(npeId) != IX_SUCCESS) { printf("\nError initialising NPE %d!", npeId); return (IX_FAIL); } /*********************************************************************** * System initialisation done. Now initialise Dma Access component. ***********************************************************************/ if (ixDmaAccInit(npeId) != IX_SUCCESS) { printf("\nError initialising Dma access driver!"); return (IX_FAIL); } /* initialize the start and stop time array */ for (counter = 0; counter < PERFORMANCE_LOOP_NUM; counter++) { ixDmaAccCodeletTimeStore.startTime[counter] = 0; ixDmaAccCodeletTimeStore.stopTime[counter] = 0; } ixDmaAccCodeletInitialised = TRUE; return (IX_SUCCESS);}/* * Function definition: ixDmaAccCodeletDispatcherPoll() * See header file for documentation. */PRIVATE void ixDmaAccCodeletDispatcherPoll (void* argUnused, void** ptrRetObjUnused){ while (1) { /* Dma NPE A: queues 19 & 20; NPE B: 24 & 26; NPE B: 25 & 27 */ (*ixDmaAccCodeletDispatcherFunc) (IX_QMGR_QUELOW_GROUP); /* Yield Execution of Current Thread with 0 Delay */ ixOsalYield(); }}/* * Function definition : ixDmaAccCodeletDispatcherStart() * See header file for documentation. */PRIVATE IX_STATUS ixDmaAccCodeletDispatcherStart(BOOL useInterrupt){ IxOsalThreadAttr threadAttr; char *pThreadName = "Dispatcher"; ixQMgrDispatcherLoopGet(&ixDmaAccCodeletDispatcherFunc); if(useInterrupt) /* Interrupt mode */ { /* * Hook the QM QLOW dispatcher to the interrupt controller. * IX_QMGR_QUELOW_GROUP refers to Queues 0-31 * Dma NPE A: queues 19 & 20; NPE B: 24 & 26; NPE B: 25 & 27 */ if (ixOsalIrqBind(IX_OSAL_IXP400_QM1_IRQ_LVL, (IxOsalVoidFnVoidPtr)ixDmaAccCodeletDispatcherFunc, (void *)IX_QMGR_QUELOW_GROUP) != IX_SUCCESS) { printf("\nFailed to bind to QM1 interrupt"); return (IX_FAIL); } } else /* Polled mode */ { threadAttr.name = pThreadName; threadAttr.stackSize = IX_DMA_CODELET_QMGR_STACK_SIZE; threadAttr.priority = IX_DMA_CODELET_QMR_PRIORITY; if (ixOsalThreadCreate(&ixDmaAccCodeletDispatchId, &threadAttr, (IxOsalVoidFnVoidPtr)ixDmaAccCodeletDispatcherPoll, NULL ) != IX_SUCCESS) { ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, "\nError spawning dispatch task", 0,0,0,0,0,0); return (IX_FAIL); } if (ixOsalThreadStart (&ixDmaAccCodeletDispatchId) != IX_SUCCESS) { ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, "\nError starting spawing dispatch task", 0,0,0,0,0,0); return (IX_FAIL); } } return (IX_SUCCESS);}/* * Function definition : ixDmaAccCodeletNpeInit() * See header file for documentation. */PRIVATE IX_STATUS ixDmaAccCodeletNpeInit(IxNpeDlNpeId npeId){ UINT32 imageId; /* Storage for single image Id */ /* Check for invalid npeId value */ /* Set the image Id for DMA component */ switch (npeId) { case IX_NPEDL_NPEID_NPEA : imageId = IX_DMA_CODELET_NPE_A_IMAGEID; break; case IX_NPEDL_NPEID_NPEB : imageId = IX_DMA_CODELET_NPE_B_IMAGEID; break; case IX_NPEDL_NPEID_NPEC : imageId = IX_DMA_CODELET_NPE_C_IMAGEID; break; default: /* Invalid NPE ID */ ixOsalLog (IX_OSAL_LOG_LVL_ALL, IX_OSAL_LOG_DEV_STDOUT, "\nDMAAccDemoNpeInit : invalid Npe ID.", 0,0,0,0,0,0); return (IX_FAIL); } /* end of switch(npeId) */ /* Download NPE code */ if(ixNpeDlNpeInitAndStart(imageId) != IX_SUCCESS) { printf("\nNPE download failed"); return(IX_FAIL); } return(IX_SUCCESS);}/* * Function definition : ixDmaAccCodeletShow() * See header file for documentation. */voidixDmaAccCodeletShow(void){ UINT32 i; /* Counter for memory dump loop */ /* Invalidate cache for source block before a read to ensure consistency */ IX_OSAL_CACHE_INVALIDATE(ixDmaAccCodeletSrcBlock,IX_DMA_CODELET_MEMDUMPSIZE); /* Show memory dump for source test array */ for(i = 0; i < IX_DMA_CODELET_MEMDUMPSIZE; i++) { if ( i%16 == 0 ) /* Show newline and address for every 16 bytes */ { printf ("\n Src Addr %02x : ", (UINT32) &ixDmaAccCodeletSrcBlock[i]); }
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