4santai.fit

在max_plus2和FPGA实验箱上实现频率计的功能

-- MAX+plus II Compiler Fit File      
-- Version 10.1 06/12/2001            
-- Compiled: 07/04/2007 18:06:43      

-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "4santai"
BEGIN

    DEVICE = "EPF10K10LC84-3";

    "I1"                           : INPUT_PIN  = 1      ;
    "I2"                           : INPUT_PIN  = 42     ;
    "I3"                           : INPUT_PIN  = 44     ;
    "I4"                           : INPUT_PIN  = 84     ;
    "SET"                          : INPUT_PIN  = 2      ;
    "Q1"                           : OUTPUT_PIN = 61     ;
    "Q2"                           : OUTPUT_PIN = 66     ;
    "Q3"                           : OUTPUT_PIN = 29     ;
    "Q4"                           : OUTPUT_PIN = 21     ;
    "~1~1"                         : LOCATION   = LC3_C19;
    "~2~1"                         : LOCATION   = LC2_B18;
    "~3~1"                         : LOCATION   = LC5_C9 ;
    "~4~1"                         : LOCATION   = LC1_B7 ;

END;

INTERNAL_INFO "4santai"
BEGIN
	DEVICE = EPF10K10LC84-3;
    OD4P1   : LORAX = "1:FB4|2:CH0R2,PA19R2C18->LC3_C19||";
    OD3P42  : LORAX = "1:FB3|2:FH3R1,PA5R1C17->LC2_B18||";
    OD2P44  : LORAX = "1:FB2|2:FH2R2,PA6R2C8->LC5_C9||";
    OD0P84  : LORAX = "1:FB0|2:FH0R1,PA0R1C6->LC1_B7||";
    OD1P2   : LORAX = "1:FB1|2:FH1R2,OE4->OH2R1P66,->OH12R2P29,->OH8R1P21,->OH2R2P61||";
    LC3_C19 : LORAX = "1:MSW2R2C19,G3R2->OH2R2P61|";
    LC2_B18 : LORAX = "1:MSW2R1C16,HHR0R1->OH2R1P66|";
    LC5_C9  : LORAX = "1:MSW4R2C8,HHL43R2->OH12R2P29|";
    LC1_B7  : LORAX = "1:MSW0R1C6,HHL22R1->OH8R1P21|";
	LC3_C19 : LORAX2 = "X, X, X, OD4P1";
	LC2_B18 : LORAX2 = "X, X, X, OD3P42";
	LC5_C9  : LORAX2 = "X, X, X, OD2P44";
	LC1_B7  : LORAX2 = "X, X, X, OD0P84";
END;