mfrc500uc.lst

Source Code Source Code Source Code Source Code Source Code Source Code Source Code Source Code Sour

 757 03d0 8091 0000 		lds r24,irqBits.3306
 758 03d4 81FF      		sbrs r24,1
 759 03d6 00C0      		rjmp .L82
 760               	.LM102:
 761 03d8 83E0      		ldi r24,lo8(3)
 762 03da 0E94 0000 		call ReadRawRC
 763 03de 8077      		andi r24,lo8(112)
 764 03e0 8037      		cpi r24,lo8(112)
 765 03e2 01F4      		brne .L82
 766               	.LM103:
 767 03e4 61E8      		ldi r22,lo8(-127)
 768 03e6 80E0      		ldi r24,lo8(0)
 769 03e8 0E94 0000 		call WriteRawRC
 770               	.LM104:
 771 03ec 89E0      		ldi r24,lo8(9)
 772 03ee 0E94 0000 		call ReadRawRC
 773 03f2 8093 0000 		sts cnt.3310,r24
 774               	.LM105:
 775 03f6 8460      		ori r24,lo8(4)
 776 03f8 682F      		mov r22,r24
 777 03fa 89E0      		ldi r24,lo8(9)
 778 03fc 0E94 0000 		call WriteRawRC
 779               	.LM106:
 780 0400 60E8      		ldi r22,lo8(-128)
 781 0402 80E0      		ldi r24,lo8(0)
 782 0404 0E94 0000 		call WriteRawRC
 783               	.L82:
 784               	.LM107:
 785 0408 8091 0000 		lds r24,irqBits.3306
 786 040c 82FF      		sbrs r24,2
 787 040e 00C0      		rjmp .L85
 788               	.LM108:
 789 0410 60E2      		ldi r22,lo8(32)
 790 0412 86E0      		ldi r24,lo8(6)
 791 0414 0E94 0000 		call WriteRawRC
 792               	.LM109:
 793 0418 64E2      		ldi r22,lo8(36)
 794 041a 87E0      		ldi r24,lo8(7)
 795 041c 0E94 0000 		call WriteRawRC
 796               	.LM110:
 797 0420 8091 0000 		lds r24,irqBits.3306
 798 0424 8F7D      		andi r24,lo8(-33)
 799 0426 8093 0000 		sts irqBits.3306,r24
 800               	.LM111:
 801 042a E091 0000 		lds r30,MpIsrInfo
 802 042e F091 0000 		lds r31,(MpIsrInfo)+1
 803 0432 8485      		ldd r24,Z+12
 804 0434 8F7D      		andi r24,lo8(-33)
 805 0436 8487      		std Z+12,r24
 806               	.LM112:
 807 0438 8485      		ldd r24,Z+12
 808 043a 8460      		ori r24,lo8(4)
 809 043c 8487      		std Z+12,r24
 810               	.L85:
 811               	.LM113:
 812 043e 8091 0000 		lds r24,irqBits.3306
 813 0442 85FF      		sbrs r24,5
 814 0444 00C0      		rjmp .L95
 815               	.LM114:
 816 0446 60E2      		ldi r22,lo8(32)
 817 0448 87E0      		ldi r24,lo8(7)
 818 044a 0E94 0000 		call WriteRawRC
 819               	.LM115:
 820 044e E091 0000 		lds r30,MpIsrInfo
 821 0452 F091 0000 		lds r31,(MpIsrInfo)+1
 822 0456 8181      		ldd r24,Z+1
 823 0458 8823      		tst r24
 824 045a 01F4      		brne .L95
 825               	.LM116:
 826 045c 8FEF      		ldi r24,lo8(-1)
 827 045e 8183      		std Z+1,r24
 828               	.L95:
 829               	.LM117:
 830 0460 83E0      		ldi r24,lo8(3)
 831 0462 0E94 0000 		call ReadRawRC
 832 0466 83FD      		sbrc r24,3
 833 0468 00C0      		rjmp .L56
 834               	.LM118:
 835 046a 6091 0000 		lds r22,oldPageSelect.3308
 836 046e 80E0      		ldi r24,lo8(0)
 837 0470 0E94 0000 		call WriteRawRC
 838               	.L90:
 839               	/* epilogue: frame size=0 */
 840 0474 1F91      		pop r17
 841 0476 0F91      		pop r16
 842 0478 0895      		ret
 843               	/* epilogue end (size=3) */
 844               	/* function SingleResponseIsr size 386 (381) */
 845               	.LFE58:
 847               	.global	ClearBitMask
 849               	ClearBitMask:
 850               	.LFB56:
 851               	.LM119:
 852               	/* prologue: frame size=0 */
 853 047a 0F93      		push r16
 854 047c 1F93      		push r17
 855               	/* prologue end (size=2) */
 856               	.LVL45:
 857 047e 082F      		mov r16,r24
 858 0480 162F      		mov r17,r22
 859               	.LM120:
 860 0482 0E94 0000 		call ReadRC
 861               	.LVL46:
 862               	.LM121:
 863 0486 1095      		com r17
 864 0488 1823      		and r17,r24
 865 048a 612F      		mov r22,r17
 866 048c 802F      		mov r24,r16
 867 048e 0E94 0000 		call WriteRC
 868               	/* epilogue: frame size=0 */
 869 0492 1F91      		pop r17
 870 0494 0F91      		pop r16
 871 0496 0895      		ret
 872               	/* epilogue end (size=3) */
 873               	/* function ClearBitMask size 15 (10) */
 874               	.LFE56:
 876               	.global	Mf500WakeUpMode
 878               	Mf500WakeUpMode:
 879               	.LFB66:
 880               	.LM122:
 881               	/* prologue: frame size=0 */
 882               	/* prologue end (size=0) */
 883               	.LM123:
 884 0498 60E1      		ldi r22,lo8(16)
 885 049a 89E0      		ldi r24,lo8(9)
 886 049c 0E94 0000 		call ClearBitMask
 887               	/* epilogue: frame size=0 */
 888 04a0 0895      		ret
 889               	/* epilogue end (size=1) */
 890               	/* function Mf500WakeUpMode size 5 (4) */
 891               	.LFE66:
 893               	.global	PcdBasicRegisterConfiguration
 895               	PcdBasicRegisterConfiguration:
 896               	.LFB60:
 897               	.LM124:
 898               	/* prologue: frame size=0 */
 899               	/* prologue end (size=0) */
 900               	.LM125:
 901 04a2 60E0      		ldi r22,lo8(0)
 902 04a4 8FE1      		ldi r24,lo8(31)
 903 04a6 0E94 0000 		call WriteRC
 904               	.LM126:
 905 04aa 60E4      		ldi r22,lo8(64)
 906 04ac 8FE1      		ldi r24,lo8(31)
 907 04ae 0E94 0000 		call WriteRC
 908               	.LBB66:
 909               	.LBB67:
 910               	.LBB68:
 911               	.LBB69:
 912               	.LBB70:
 913               	.LBB71:
 914               	.LM127:
 915 04b2 84E1      		ldi r24,lo8(276)
 916 04b4 91E0      		ldi r25,hi8(276)
 917               	.LVL47:
 918               	/* #APP */
 919 04b6 0197      		1: sbiw r24,1
 920 04b8 01F4      		brne 1b
 921               	/* #NOAPP */
 922               	.LBE71:
 923               	.LBE70:
 924               	.LBE69:
 925               	.LBE68:
 926               	.LBE67:
 927               	.LBE66:
 928               	.LM128:
 929 04ba 60E4      		ldi r22,lo8(64)
 930 04bc 8FE1      		ldi r24,lo8(31)
 931               	.LVL48:
 932 04be 0E94 0000 		call ClearBitMask
 933               	.LM129:
 934 04c2 69E2      		ldi r22,lo8(41)
 935 04c4 8EE1      		ldi r24,lo8(30)
 936 04c6 0E94 0000 		call WriteRC
 937               	.LM130:
 938 04ca 63E0      		ldi r22,lo8(3)
 939 04cc 8DE2      		ldi r24,lo8(45)
 940 04ce 0E94 0000 		call WriteRC
 941               	.LM131:
 942 04d2 80E0      		ldi r24,lo8(0)
 943 04d4 90E0      		ldi r25,hi8(0)
 944               	/* epilogue: frame size=0 */
 945 04d6 0895      		ret
 946               	/* epilogue end (size=1) */
 947               	/* function PcdBasicRegisterConfiguration size 29 (28) */
 948               	.LFE60:
 950               	.global	SetBitMask
 952               	SetBitMask:
 953               	.LFB55:
 954               	.LM132:
 955               	/* prologue: frame size=0 */
 956 04d8 0F93      		push r16
 957 04da 1F93      		push r17
 958               	/* prologue end (size=2) */
 959               	.LVL49:
 960 04dc 082F      		mov r16,r24
 961 04de 162F      		mov r17,r22
 962               	.LM133:
 963 04e0 0E94 0000 		call ReadRC
 964               	.LVL50:
 965               	.LM134:
 966 04e4 182B      		or r17,r24
 967 04e6 612F      		mov r22,r17
 968 04e8 802F      		mov r24,r16
 969 04ea 0E94 0000 		call WriteRC
 970               	/* epilogue: frame size=0 */
 971 04ee 1F91      		pop r17
 972 04f0 0F91      		pop r16
 973 04f2 0895      		ret
 974               	/* epilogue end (size=3) */
 975               	/* function SetBitMask size 14 (9) */
 976               	.LFE55:
 978               	.global	Mf500StandbyMode
 980               	Mf500StandbyMode:
 981               	.LFB65:
 982               	.LM135:
 983               	/* prologue: frame size=0 */
 984               	/* prologue end (size=0) */
 985               	.LM136:
 986 04f4 60E1      		ldi r22,lo8(16)
 987 04f6 89E0      		ldi r24,lo8(9)
 988 04f8 0E94 0000 		call SetBitMask
 989               	/* epilogue: frame size=0 */
 990 04fc 0895      		ret
 991               	/* epilogue end (size=1) */
 992               	/* function Mf500StandbyMode size 5 (4) */
 993               	.LFE65:
 995               	.global	FlushFIFO
 997               	FlushFIFO:
 998               	.LFB57:
 999               	.LM137:
 1000               	/* prologue: frame size=0 */
 1001               	/* prologue end (size=0) */
 1002               	.LM138:
 1003 04fe 61E0      		ldi r22,lo8(1)
 1004 0500 89E0      		ldi r24,lo8(9)
 1005 0502 0E94 0000 		call SetBitMask
 1006               	/* epilogue: frame size=0 */
 1007 0506 0895      		ret
 1008               	/* epilogue end (size=1) */
 1009               	/* function FlushFIFO size 5 (4) */
 1010               	.LFE57:
 1012               	.global	PcdSingleResponseCmd
 1014               	PcdSingleResponseCmd:
 1015               	.LFB59:
 1016               	.LM139:
 1017               	/* prologue: frame size=2 */
 1018 0508 8F92      		push r8
 1019 050a 9F92      		push r9
 1020 050c BF92      		push r11
 1021 050e CF92      		push r12
 1022 0510 DF92      		push r13
 1023 0512 EF92      		push r14
 1024 0514 FF92      		push r15
 1025 0516 0F93      		push r16
 1026 0518 1F93      		push r17
 1027 051a CF93      		push r28
 1028 051c DF93      		push r29
 1029 051e CDB7      		in r28,__SP_L__
 1030 0520 DEB7      		in r29,__SP_H__
 1031 0522 2297      		sbiw r28,2
 1032 0524 0FB6      		in __tmp_reg__,__SREG__
 1033 0526 F894      		cli
 1034 0528 DEBF      		out __SP_H__,r29
 1035 052a 0FBE      		out __SREG__,__tmp_reg__
 1036 052c CDBF      		out __SP_L__,r28
 1037               	/* prologue end (size=19) */
 1038               	.LVL51:
 1039 052e 082F      		mov r16,r24
 1040 0530 7B01      		movw r14,r22
 1041 0532 6A01      		movw r12,r20
 1042 0534 4901      		movw r8,r18
 1043               	.LM140:
 1044 0536 6FE7      		ldi r22,lo8(127)
 1045               	.LVL52:
 1046 0538 86E0      		ldi r24,lo8(6)
 1047               	.LVL53:
 1048 053a 0E94 0000 		call WriteRC
 1049               	.LVL54:
 1050               	.LM141:
 1051 053e 6FE7      		ldi r22,lo8(127)
 1052 0540 87E0      		ldi r24,lo8(7)
 1053 0542 0E94 0000 		call WriteRC
 1054               	.LM142:
 1055 0546 0E94 0000 		call FlushFIFO
 1056               	.L109:
 1057               	.LM143:
 1058 054a 85E0      		ldi r24,lo8(5)
 1059 054c 0E94 0000 		call ReadRC
 1060 0550 86FF      		sbrs r24,6
 1061 0552 00C0      		rjmp .L109
 1062               	.LM144:
 1063 0554 60E0      		ldi r22,lo8(0)
 1064 0556 81E0      		ldi r24,lo8(1)
 1065 0558 0E94 0000 		call WriteRC
 1066               	.LM145:
 1067 055c 89E2      		ldi r24,lo8(41)
 1068 055e 0E94 0000 		call ReadRC
 1069 0562 B82E      		mov r11,r24
 1070               	.LVL55:
 1071               	.LM146:
 1072 0564 60E2      		ldi r22,lo8(32)
 1073 0566 89E2      		ldi r24,lo8(41)
 1074 0568 0E94 0000 		call WriteRC
 1075               	.LM147:
 1076 056c 9092 0000 		sts (MpIsrInfo)+1,r9
 1077 0570 8092 0000 		sts MpIsrInfo,r8
 1078               	.LM148:
 1079 0574 F092 0000 		sts (MpIsrOut)+1,r15
 1080 0578 E092 0000 		sts MpIsrOut,r14
 1081               	.LM149:
 1082 057c D092 0000 		sts (MpIsrIn)+1,r13
 1083 0580 C092 0000 		sts MpIsrIn,r12
 1084               	.LM150:
 1085 0584 F401      		movw r30,r8
 1086 0586 1486      		std Z+12,__zero_reg__
 1087               	.LM151:
 1088 0588 EA9A      		sbi 61-0x20,2
 1089               	.LM152:
 1090 058a 0C30      		cpi r16,lo8(12)
 1091 058c 01F0      		breq .L117
 1092 058e 0D30      		cpi r16,lo8(13)
 1093 0590 00F4      		brsh .L122
 1094 0592 0330      		cpi r16,lo8(3)
 1095 0594 01F0      		breq .L114
 1096 0596 0430      		cpi r16,lo8(4)
 1097 0598 00F4      		brsh .L123
 1098 059a 0023      		tst r16
 1099 059c 01F0      		breq .L112
 1100 059e 0130      		cpi r16,lo8(1)
 1101 05a0 01F4      		brne .L111
 1102 05a2 00C0      		rjmp .L113
 1103               	.L123:
 1104 05a4 0730      		cpi r16,lo8(7)
 1105 05a6 01F0      		breq .L115
 1106 05a8 0B30      		cpi r16,lo8(11)
 1107 05aa 01F4      		brne .L111
 1108 05ac 00C0      		rjmp .L116
 1109               	.L122:
 1110 05ae 0631      		cpi r16,lo8(22)
 1111 05b0 01F0      		breq .L120
 1112 05b2 0731      		cpi r16,lo8(23)
 1113 05b4 00F4      		brsh .L124
 1114 05b6 0231      		cpi r16,lo8(18)
 1115 05b8 01F0      		breq .L118
 1116 05ba 0431      		cpi r16,lo8(20)
 1117 05bc 01F4      		brne .L111
 1118 05be 00C0      		rjmp .L119
 1119               	.L124:
 1120 05c0 0931      		cpi r16,lo8(25)
 1121 05c2 00F0      		brlo .L111
 1122 05c4 0B31      		cpi r16,lo8(27)
 1123 05c6 00F0      		brlo .L115
 1124 05c8 0E31      		cpi r16,lo8(30)
 1125 05ca 01F0      		breq .L121
 1126               	.L111:
 1127 05cc 19EE      		ldi r17,lo8(-23)
 1128               	.LVL56:
 1129 05ce 00C0      		rjmp .L125
 1130               	.LVL57:
 1131               	.L119:
 1132 05d0 94E0      		ldi r25,lo8(4)