objdump

Embest S3CEB2410驱动例程源代码。

30001270:	e5832000 	str	r2, [r3]
30001274:	e59f30bc 	ldr	r3, [pc, #bc]	; 30001338 <Delay+0x120>
30001278:	e5832000 	str	r2, [r3]
3000127c:	e59f20b8 	ldr	r2, [pc, #b8]	; 3000133c <Delay+0x124>
30001280:	e3a03453 	mov	r3, #1392508928	; 0x53000000
30001284:	e5832000 	str	r2, [r3]
30001288:	e1a00000 	nop			(mov r0,r0)
3000128c:	e51b3010 	ldr	r3, [fp, -#16]
30001290:	e3530000 	cmp	r3, #0	; 0x0
30001294:	ca000000 	bgt	3000129c <Delay+0x84>
30001298:	ea00000e 	b	300012d8 <Delay+0xc0>
3000129c:	e3a03000 	mov	r3, #0	; 0x0
300012a0:	e50b3014 	str	r3, [fp, -#20]
300012a4:	e59f307c 	ldr	r3, [pc, #7c]	; 30001328 <Delay+0x110>
300012a8:	e5932000 	ldr	r2, [r3]
300012ac:	e51b3014 	ldr	r3, [fp, -#20]
300012b0:	e1530002 	cmp	r3, r2
300012b4:	ba000003 	blt	300012c8 <Delay+0xb0>
300012b8:	e51b3010 	ldr	r3, [fp, -#16]
300012bc:	e2433001 	sub	r3, r3, #1	; 0x1
300012c0:	e50b3010 	str	r3, [fp, -#16]
300012c4:	eafffff0 	b	3000128c <Delay+0x74>
300012c8:	e51b3014 	ldr	r3, [fp, -#20]
300012cc:	e2833001 	add	r3, r3, #1	; 0x1
300012d0:	e50b3014 	str	r3, [fp, -#20]
300012d4:	eafffff2 	b	300012a4 <Delay+0x8c>
300012d8:	e51b3018 	ldr	r3, [fp, -#24]
300012dc:	e3530001 	cmp	r3, #1	; 0x1
300012e0:	1a00000f 	bne	30001324 <Delay+0x10c>
300012e4:	e59f2040 	ldr	r2, [pc, #40]	; 3000132c <Delay+0x114>
300012e8:	e3a03453 	mov	r3, #1392508928	; 0x53000000
300012ec:	e5832000 	str	r2, [r3]
300012f0:	e59f3040 	ldr	r3, [pc, #40]	; 30001338 <Delay+0x120>
300012f4:	e5933000 	ldr	r3, [r3]
300012f8:	e2633cff 	rsb	r3, r3, #65280	; 0xff00
300012fc:	e28330ff 	add	r3, r3, #255	; 0xff
30001300:	e50b3014 	str	r3, [fp, -#20]
30001304:	e51b3014 	ldr	r3, [fp, -#20]
30001308:	e1a03303 	mov	r3, r3, lsl #6
3000130c:	e59f002c 	ldr	r0, [pc, #2c]	; 30001340 <Delay+0x128>
30001310:	e1a01003 	mov	r1, r3
30001314:	eb001b29 	bl	30007fc0 <__divsi3>
30001318:	e1a02000 	mov	r2, r0
3000131c:	e59f3004 	ldr	r3, [pc, #4]	; 30001328 <Delay+0x110>
30001320:	e5832000 	str	r2, [r3]
30001324:	e91ba800 	ldmdb	fp, {fp, sp, pc}
30001328:	30009860 	andcc	r9, r0, r0, ror #16
3000132c:	00003110 	andeq	r3, r0, r0, lsl r1
30001330:	0000ffff 	streqd	pc, [r0], -pc
30001334:	53000004 	tstpl	r0, #4	; 0x4
30001338:	53000008 	tstpl	r0, #8	; 0x8
3000133c:	00003130 	andeq	r3, r0, r0, lsr r1
30001340:	007a1200 	rsbeqs	r1, sl, r0, lsl #4

30001344 <SET_IF>:
30001344:	e10f0000 	mrs	r0, CPSR
30001348:	e1a01000 	mov	r1, r0
3000134c:	e38110c0 	orr	r1, r1, #192	; 0xc0
30001350:	e12ff001 	msr	CPSR_fsxc, r1
30001354:	e1a0f00e 	mov	pc, lr

30001358 <WR_IF>:
30001358:	e12ff000 	msr	CPSR_fsxc, r0
3000135c:	e1a0f00e 	mov	pc, lr

30001360 <CLR_IF>:
30001360:	e10f0000 	mrs	r0, CPSR
30001364:	e3c000c0 	bic	r0, r0, #192	; 0xc0
30001368:	e12ff000 	msr	CPSR_fsxc, r0
3000136c:	e1a0f00e 	mov	pc, lr

30001370 <MMU_EnableICache>:
30001370:	ee110f10 	mrc	15, 0, r0, cr1, cr0, {0}
30001374:	e3800a01 	orr	r0, r0, #4096	; 0x1000
30001378:	ee010f10 	mcr	15, 0, r0, cr1, cr0, {0}
3000137c:	e1a0f00e 	mov	pc, lr

30001380 <MMU_DisableICache>:
30001380:	ee110f10 	mrc	15, 0, r0, cr1, cr0, {0}
30001384:	e3c00a01 	bic	r0, r0, #4096	; 0x1000
30001388:	ee010f10 	mcr	15, 0, r0, cr1, cr0, {0}
3000138c:	e1a0f00e 	mov	pc, lr

30001390 <MMU_EnableDCache>:
30001390:	ee110f10 	mrc	15, 0, r0, cr1, cr0, {0}
30001394:	e3800004 	orr	r0, r0, #4	; 0x4
30001398:	ee010f10 	mcr	15, 0, r0, cr1, cr0, {0}
3000139c:	e1a0f00e 	mov	pc, lr

300013a0 <MMU_DisableDCache>:
300013a0:	ee110f10 	mrc	15, 0, r0, cr1, cr0, {0}
300013a4:	e3c00004 	bic	r0, r0, #4	; 0x4
300013a8:	ee010f10 	mcr	15, 0, r0, cr1, cr0, {0}
300013ac:	e1a0f00e 	mov	pc, lr

300013b0 <MMU_EnableAlignFault>:
300013b0:	ee110f10 	mrc	15, 0, r0, cr1, cr0, {0}
300013b4:	e3800002 	orr	r0, r0, #2	; 0x2
300013b8:	ee010f10 	mcr	15, 0, r0, cr1, cr0, {0}
300013bc:	e1a0f00e 	mov	pc, lr

300013c0 <MMU_DisableAlignFault>:
300013c0:	ee110f10 	mrc	15, 0, r0, cr1, cr0, {0}
300013c4:	e3c00002 	bic	r0, r0, #2	; 0x2
300013c8:	ee010f10 	mcr	15, 0, r0, cr1, cr0, {0}
300013cc:	e1a0f00e 	mov	pc, lr

300013d0 <MMU_EnableMMU>:
300013d0:	ee110f10 	mrc	15, 0, r0, cr1, cr0, {0}
300013d4:	e3800001 	orr	r0, r0, #1	; 0x1
300013d8:	ee010f10 	mcr	15, 0, r0, cr1, cr0, {0}
300013dc:	e1a0f00e 	mov	pc, lr

300013e0 <MMU_DisableMMU>:
300013e0:	ee110f10 	mrc	15, 0, r0, cr1, cr0, {0}
300013e4:	e3c00001 	bic	r0, r0, #1	; 0x1
300013e8:	ee010f10 	mcr	15, 0, r0, cr1, cr0, {0}
300013ec:	e1a0f00e 	mov	pc, lr

300013f0 <MMU_SetFastBusMode>:
300013f0:	ee110f10 	mrc	15, 0, r0, cr1, cr0, {0}
300013f4:	e3c00103 	bic	r0, r0, #-1073741824	; 0xc0000000
300013f8:	ee010f10 	mcr	15, 0, r0, cr1, cr0, {0}
300013fc:	e1a0f00e 	mov	pc, lr

30001400 <MMU_SetAsyncBusMode>:
30001400:	ee110f10 	mrc	15, 0, r0, cr1, cr0, {0}
30001404:	e3800103 	orr	r0, r0, #-1073741824	; 0xc0000000
30001408:	ee010f10 	mcr	15, 0, r0, cr1, cr0, {0}
3000140c:	e1a0f00e 	mov	pc, lr

30001410 <MMU_SetTTBase>:
30001410:	ee020f10 	mcr	15, 0, r0, cr2, cr0, {0}
30001414:	e1a0f00e 	mov	pc, lr

30001418 <MMU_SetDomain>:
30001418:	ee030f10 	mcr	15, 0, r0, cr3, cr0, {0}
3000141c:	e1a0f00e 	mov	pc, lr

30001420 <MMU_InvalidateIDCache>:
30001420:	ee070f17 	mcr	15, 0, r0, cr7, cr7, {0}
30001424:	e1a0f00e 	mov	pc, lr

30001428 <MMU_InvalidateICache>:
30001428:	ee070f15 	mcr	15, 0, r0, cr7, cr5, {0}
3000142c:	e1a0f00e 	mov	pc, lr

30001430 <MMU_InvalidateICacheMVA>:
30001430:	ee070f35 	mcr	15, 0, r0, cr7, cr5, {1}
30001434:	e1a0f00e 	mov	pc, lr

30001438 <MMU_PrefetchICacheMVA>:
30001438:	ee070f3d 	mcr	15, 0, r0, cr7, cr13, {1}
3000143c:	e1a0f00e 	mov	pc, lr

30001440 <MMU_InvalidateDCache>:
30001440:	ee070f16 	mcr	15, 0, r0, cr7, cr6, {0}
30001444:	e1a0f00e 	mov	pc, lr

30001448 <MMU_InvalidateDCacheMVA>:
30001448:	ee070f36 	mcr	15, 0, r0, cr7, cr6, {1}
3000144c:	e1a0f00e 	mov	pc, lr

30001450 <MMU_CleanDCacheMVA>:
30001450:	ee070f3a 	mcr	15, 0, r0, cr7, cr10, {1}
30001454:	e1a0f00e 	mov	pc, lr

30001458 <MMU_CleanInvalidateDCacheMVA>:
30001458:	ee070f3e 	mcr	15, 0, r0, cr7, cr14, {1}
3000145c:	e1a0f00e 	mov	pc, lr

30001460 <MMU_CleanDCacheIndex>:
30001460:	ee070f5a 	mcr	15, 0, r0, cr7, cr10, {2}
30001464:	e1a0f00e 	mov	pc, lr

30001468 <MMU_CleanInvalidateDCacheIndex>:
30001468:	ee070f5e 	mcr	15, 0, r0, cr7, cr14, {2}
3000146c:	e1a0f00e 	mov	pc, lr

30001470 <MMU_WaitForInterrupt>:
30001470:	ee070f90 	mcr	15, 0, r0, cr7, cr0, {4}
30001474:	e1a0f00e 	mov	pc, lr

30001478 <MMU_InvalidateTLB>:
30001478:	ee080f17 	mcr	15, 0, r0, cr8, cr7, {0}
3000147c:	e1a0f00e 	mov	pc, lr

30001480 <MMU_InvalidateITLB>:
30001480:	ee080f15 	mcr	15, 0, r0, cr8, cr5, {0}
30001484:	e1a0f00e 	mov	pc, lr

30001488 <MMU_InvalidateITLBMVA>:
30001488:	ee080f35 	mcr	15, 0, r0, cr8, cr5, {1}
3000148c:	e1a0f00e 	mov	pc, lr

30001490 <MMU_InvalidateDTLB>:
30001490:	ee080f16 	mcr	15, 0, r0, cr8, cr6, {0}
30001494:	e1a0f00e 	mov	pc, lr

30001498 <MMU_InvalidateDTLBMVA>:
30001498:	ee080f36 	mcr	15, 0, r0, cr8, cr6, {1}
3000149c:	e1a0f00e 	mov	pc, lr

300014a0 <MMU_SetDCacheLockdownBase>:
300014a0:	ee090f10 	mcr	15, 0, r0, cr9, cr0, {0}
300014a4:	e1a0f00e 	mov	pc, lr

300014a8 <MMU_SetICacheLockdownBase>:
300014a8:	ee090f30 	mcr	15, 0, r0, cr9, cr0, {1}
300014ac:	e1a0f00e 	mov	pc, lr

300014b0 <MMU_SetDTLBLockdown>:
300014b0:	ee0a0f10 	mcr	15, 0, r0, cr10, cr0, {0}
300014b4:	e1a0f00e 	mov	pc, lr

300014b8 <MMU_SetITLBLockdown>:
300014b8:	ee0a0f30 	mcr	15, 0, r0, cr10, cr0, {1}
300014bc:	e1a0f00e 	mov	pc, lr

300014c0 <MMU_SetProcessId>:
300014c0:	ee0d0f10 	mcr	15, 0, r0, cr13, cr0, {0}
300014c4:	e1a0f00e 	mov	pc, lr

300014c8 <SWI_ISR>:
300014c8:	e1b0f00e 	movs	pc, lr

300014cc <Eint0Int>:
300014cc:	e1a0c00d 	mov	ip, sp
300014d0:	e92dd80d 	stmdb	sp!, {r0, r2, r3, fp, ip, lr, pc}
300014d4:	e24cb004 	sub	fp, ip, #4	; 0x4
300014d8:	e59f0020 	ldr	r0, [pc, #20]	; 30001500 <Eint0Int+0x34>
300014dc:	ebfffe7a 	bl	30000ecc <Uart_Printf>
300014e0:	e3a02001 	mov	r2, #1	; 0x1
300014e4:	e3a0344a 	mov	r3, #1241513984	; 0x4a000000
300014e8:	e5832000 	str	r2, [r3]
300014ec:	e59f3010 	ldr	r3, [pc, #10]	; 30001504 <Eint0Int+0x38>
300014f0:	e5832000 	str	r2, [r3]
300014f4:	e5933000 	ldr	r3, [r3]
300014f8:	e91b680d 	ldmdb	fp, {r0, r2, r3, fp, sp, lr}
300014fc:	e25ef004 	subs	pc, lr, #4	; 0x4
30001500:	30009fa8 	andcc	r9, r0, r8, lsr #31
30001504:	4a000010 	bmi	3000154c <Eint11_19+0x8>

30001508 <Eint2Int>:
30001508:	e1a0c00d 	mov	ip, sp
3000150c:	e92dd80d 	stmdb	sp!, {r0, r2, r3, fp, ip, lr, pc}
30001510:	e24cb004 	sub	fp, ip, #4	; 0x4
30001514:	e59f0020 	ldr	r0, [pc, #20]	; 3000153c <Eint2Int+0x34>
30001518:	ebfffe6b 	bl	30000ecc <Uart_Printf>
3000151c:	e3a02004 	mov	r2, #4	; 0x4
30001520:	e3a0344a 	mov	r3, #1241513984	; 0x4a000000
30001524:	e5832000 	str	r2, [r3]
30001528:	e59f3010 	ldr	r3, [pc, #10]	; 30001540 <Eint2Int+0x38>
3000152c:	e5832000 	str	r2, [r3]
30001530:	e5933000 	ldr	r3, [r3]
30001534:	e91b680d 	ldmdb	fp, {r0, r2, r3, fp, sp, lr}
30001538:	e25ef004 	subs	pc, lr, #4	; 0x4
3000153c:	30009fc8 	andcc	r9, r0, r8, asr #31
30001540:	4a000010 	bmi	30001588 <Eint11_19+0x44>

30001544 <Eint11_19>:
30001544:	e1a0c00d 	mov	ip, sp
30001548:	e92dd80f 	stmdb	sp!, {r0, r1, r2, r3, fp, ip, lr, pc}
3000154c:	e24cb004 	sub	fp, ip, #4	; 0x4
30001550:	e59f3084 	ldr	r3, [pc, #84]	; 300015dc <Eint11_19+0x98>
30001554:	e5933000 	ldr	r3, [r3]
30001558:	e3530b02 	cmp	r3, #2048	; 0x800
3000155c:	1a000005 	bne	30001578 <Eint11_19+0x34>
30001560:	e59f0078 	ldr	r0, [pc, #78]	; 300015e0 <Eint11_19+0x9c>
30001564:	ebfffe58 	bl	30000ecc <Uart_Printf>
30001568:	e3a02b02 	mov	r2, #2048	; 0x800
3000156c:	e59f3068 	ldr	r3, [pc, #68]	; 300015dc <Eint11_19+0x98>
30001570:	e5832000 	str	r2, [r3]
30001574:	ea000010 	b	300015bc <Eint11_19+0x78>
30001578:	e59f305c 	ldr	r3, [pc, #5c]	; 300015dc <Eint11_19+0x98>
3000157c:	e5933000 	ldr	r3, [r3]
30001580:	e3530702 	cmp	r3, #524288	; 0x80000
30001584:	1a000005 	bne	300015a0 <Eint11_19+0x5c>
30001588:	e59f0054 	ldr	r0, [pc, #54]	; 300015e4 <Eint11_19+0xa0>
3000158c:	ebfffe4e 	bl	30000ecc <Uart_Printf>
30001590:	e3a02702 	mov	r2, #524288	; 0x80000
30001594:	e59f3040 	ldr	r3, [pc, #40]	; 300015dc <Eint11_19+0x98>
30001598:	e5832000 	str	r2, [r3]
3000159c:	ea000006 	b	300015bc <Eint11_19+0x78>
300015a0:	e59f0040 	ldr	r0, [pc, #40]	; 300015e8 <Eint11_19+0xa4>
300015a4:	e59f3030 	ldr	r3, [pc, #30]	; 300015dc <Eint11_19+0x98>
300015a8:	e5931000 	ldr	r1, [r3]
300015ac:	ebfffe46 	bl	30000ecc <Uart_Printf>
300015b0:	e59f2034 	ldr	r2, [pc, #34]	; 300015ec <Eint11_19+0xa8>
300015b4:	e59f3020 	ldr	r3, [pc, #20]	; 300015dc <Eint11_19+0x98>
300015b8:	e5832000 	str	r2, [r3]
300015bc:	e3a02020 	mov	r2, #32	; 0x20
300015c0:	e3a0344a 	mov	r3, #1241513984	; 0x4a000000
300015c4:	e5832000 	str	r2, [r3]
300015c8:	e59f3020 	ldr	r3, [pc, #20]	; 300015f0 <Eint11_19+0xac>
300015cc:	e5832000 	str	r2, [r3]
300015d0:	e5933000 	ldr	r3, [r3]
300015d4:	e91b680f 	ldmdb	fp, {r0, r1, r2, r3, fp, sp, lr}
300015d8:	e25ef004 	subs	pc, lr, #4	; 0x4
300015dc:	560000a8 	strpl	r0, [r0], -r8, lsr #1
300015e0:	30009fe8 	andcc	r9, r0, r8, ror #31
300015e4:	3000a008 	andcc	sl, r0, r8
300015e8:	3000a028 	andcc	sl, r0, r8, lsr #32
300015ec:	00080800 	andeq	r0, r8, r0, lsl #16
300015f0:	4a000010 	bmi	30001638 <Test_Eint+0x44>

300015f4 <Test_Eint>:
300015f4:	e1a0c00d 	mov	ip, sp
300015f8:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
300015fc:	e24cb004 	sub	fp, ip, #4	; 0x4
30001600:	e24dd008 	sub	sp, sp, #8	; 0x8
30001604:	e59f0280 	ldr	r0, [pc, #280]	; 3000188c <Test_Eint+0x298>
30001608:	ebfffe2f 	bl	30000ecc <Uart_Printf>
3000160c:	e59f027c 	ldr	r0, [pc, #27c]	; 30001890 <Test_Eint+0x29c>
30001610:	ebfffe2d 	bl	30000ecc <Uart_Printf>
30001614:	e59f0278 	ldr	r0, [pc, #278]	; 30001894 <Test_Eint+0x2a0>
3