rsic.fit.eqn

来自「这是我同学在上海交大实习的时候做的一个单片机的verilog代码实现」· EQN 代码 · 共 29 行

EQN
29
字号
-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--clk is clk at PIN_C1
--operation mode is input

clk = INPUT();


--rst is rst at PIN_D1
--operation mode is input

rst = INPUT();





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