rsic.map.summary

这是我同学在上海交大实习的时候做的一个单片机的verilog代码实现

Analysis & Synthesis Status : Successful - Tue Jul 29 10:34:15 2008
Quartus II Version : 5.1 Build 176 10/26/2005 SJ Full Version
Revision Name : rsic
Top-level Entity Name : rsic
Family : Cyclone II
Total combinational functions : 0
Total registers : 0
Total pins : 2
Total virtual pins : 0
Total memory bits : 0
Embedded Multiplier 9-bit elements : 0
Total PLLs : 0