spi.lst

ISD1720芯片实现录音,定点录音,播放,定点播放等.

    0231 F159      BEQ	0x025D
    0232 3E6B      CPI	R22,0xEB
    0233 E0E0      LDI	R30,0
    0234 077E      CPC	R23,R30
    0235 F129      BEQ	0x025B
    0236 3E6D      CPI	R22,0xED
    0237 E0E0      LDI	R30,0
    0238 077E      CPC	R23,R30
    0239 F0F9      BEQ	0x0259
    023A 3E6E      CPI	R22,0xEE
    023B E0E0      LDI	R30,0
    023C 077E      CPC	R23,R30
    023D F0C9      BEQ	0x0257
    023E C020      RJMP	0x025F
(0025)  { case 0x7E:key=0;break;//0
    023F 2744      CLR	R20
    0240 C01F      RJMP	0x0260
(0026)    case 0x7D:key=10;break;//.
    0241 E04A      LDI	R20,0xA
    0242 C01D      RJMP	0x0260
(0027)    case 0x7B:key=11;break;//*
    0243 E04B      LDI	R20,0xB
    0244 C01B      RJMP	0x0260
(0028)    case 0x77:key=15;break;//=
    0245 E04F      LDI	R20,0xF
    0246 C019      RJMP	0x0260
(0029)    case 0xBE:key=1;break;//1
    0247 E041      LDI	R20,1
    0248 C017      RJMP	0x0260
(0030)    case 0xBD:key=2;break;//2
    0249 E042      LDI	R20,2
    024A C015      RJMP	0x0260
(0031)    case 0xBB:key=3;break;//3
    024B E043      LDI	R20,3
    024C C013      RJMP	0x0260
(0032)    case 0xB7:key=14;break;//-
    024D E04E      LDI	R20,0xE
    024E C011      RJMP	0x0260
(0033)    case 0xDE:key=4;break;//4
    024F E044      LDI	R20,4
    0250 C00F      RJMP	0x0260
(0034)    case 0xDD:key=5;break;//5
    0251 E045      LDI	R20,5
    0252 C00D      RJMP	0x0260
(0035)    case 0xDB:key=6;break;//6
    0253 E046      LDI	R20,6
    0254 C00B      RJMP	0x0260
(0036)    case 0xD7:key=13;break;//+
    0255 E04D      LDI	R20,0xD
    0256 C009      RJMP	0x0260
(0037)    case 0xEE:key=7;break;//7
    0257 E047      LDI	R20,7
    0258 C007      RJMP	0x0260
(0038)    case 0xED:key=8;break;//8
    0259 E048      LDI	R20,0x8
    025A C005      RJMP	0x0260
(0039)    case 0xEB:key=9;break;//9
    025B E049      LDI	R20,0x9
    025C C003      RJMP	0x0260
(0040)    case 0xE7:key=12;break;//C
    025D E04C      LDI	R20,0xC
    025E C001      RJMP	0x0260
(0041)    default:key=16;
    025F E140      LDI	R20,0x10
(0042)    }
(0043)     return key;}
    0260 2F04      MOV	R16,R20
    0261 940E032C  CALL	pop_gset4
    0263 9508      RET
_key_press:
  j                    --> R20
  i                    --> R20
    0264 940E0337  CALL	push_gset1
(0044) 
(0045) uchar key_press()
(0046) {   uchar i,j;
(0047)     DDRD=0XFF;
    0266 EF8F      LDI	R24,0xFF
    0267 BB81      OUT	0x11,R24
(0048)     PORTD=0XF0;
    0268 EF80      LDI	R24,0xF0
    0269 BB82      OUT	0x12,R24
(0049) 	DDRD=0X0F;
    026A E08F      LDI	R24,0xF
    026B BB81      OUT	0x11,R24
(0050) 	delayms(1);
    026C E001      LDI	R16,1
    026D E010      LDI	R17,0
    026E DF20      RCALL	_delayms
(0051) 	i=PIND;
    026F B340      IN	R20,0x10
(0052) 	if(i==0xF0) j = 0;
    0270 3F40      CPI	R20,0xF0
    0271 F411      BNE	0x0274
    0272 2744      CLR	R20
    0273 C001      RJMP	0x0275
(0053) 	else j = 1;
    0274 E041      LDI	R20,1
(0054) 	return j;
    0275 2F04      MOV	R16,R20
    0276 940E033A  CALL	pop_gset1
    0278 9508      RET
FILE: E:\写的程序\AVR(C)\SPI.c
(0001) #include "1602显示.c"
(0002) #include "4X4键盘.c"
(0003) 
(0004) void spi_sent_init(void)
(0005) { PORTB |= (1<<PB4)|(1<<PB5)|(1<<PB6)|(1<<PB7); 
_spi_sent_init:
    0279 B388      IN	R24,0x18
    027A 6F80      ORI	R24,0xF0
    027B BB88      OUT	0x18,R24
(0006)   DDRB |= (1<<DDB5)|(1<<DDB7)|(1<<DDB4);       //设置MOSI,SCK和SS为输出 
    027C B387      IN	R24,0x17
    027D 6B80      ORI	R24,0xB0
    027E BB87      OUT	0x17,R24
(0007)   SPCR = (1<<SPE)|(1<<DORD)|(1<<MSTR)|(1<<SPR1)|(1<<SPR0);//设置为主机,LSB先发送
    027F E783      LDI	R24,0x73
    0280 B98D      OUT	0x0D,R24
(0008)   SPSR = 0x00;              //预分频为128
    0281 2422      CLR	R2
    0282 B82E      OUT	0x0E,R2
    0283 9508      RET
_SPI_sent:
  sign                 --> R20
  Data                 --> R16
    0284 940E0337  CALL	push_gset1
(0009) }
(0010) 
(0011) unsigned char SPI_sent(unsigned int Data)
(0012) { 
(0013)   unsigned char sign;
(0014)   PORTB &=~ (1<<PB4);            //强制接收方进入从模式
    0286 98C4      CBI	0x18,4
(0015)   SPCR |= (1<<MSTR);             // MSTR有时会被清零，这里强制进入主机模式
    0287 9A6C      SBI	0x0D,4
(0016)   SPDR = Data;              //启动数据传输 
    0288 B90F      OUT	0x0F,R16
(0017)   while(!(SPSR&(1<<SPIF)));      //等待传输结束 
    0289 9B77      SBIS	0x0E,7
    028A CFFE      RJMP	0x0289
(0018)   PORTB |= (1<<PB4);
    028B 9AC4      SBI	0x18,4
(0019)   sign=SPSR;
    028C B14E      IN	R20,0x0E
(0020)   sign=SPDR;
    028D B14F      IN	R20,0x0F
(0021)   return sign;            
    028E 2F04      MOV	R16,R20
    028F 940E033A  CALL	pop_gset1
    0291 9508      RET
(0022) }
(0023) /**********************************************************
(0024)    注意下面接到的数据是发的两位，原因可能是多接收了一位
(0025) /************************************************************/
(0026) void SPI_receive_int(void)
(0027) {
(0028)    /* 设置MISO为输出，其他为输入 */
(0029)     DDRB=0x02;
_SPI_receive_int:
    0292 E082      LDI	R24,2
    0293 BB87      OUT	0x17,R24
(0030) 	PORTB|=BIT(4);
    0294 9AC4      SBI	0x18,4
    0295 9508      RET
(0031) }
(0032) unsigned char SPI_receive()
(0033) {
(0034)    unsigned char receive;
(0035)    SPCR = (1<<SPE)|(1<<DORD);/* 使能 SPI */
_SPI_receive:
  receive              --> R16
    0296 E680      LDI	R24,0x60
    0297 B98D      OUT	0x0D,R24
(0036)    while(!(SPSR & (1<<SPIF)));/* 等待接收结束 */
    0298 9B77      SBIS	0x0E,7
    0299 CFFE      RJMP	0x0298
(0037)    receive=SPSR;
    029A B10E      IN	R16,0x0E
(0038)    receive=SPDR;
    029B B10F      IN	R16,0x0F
(0039)    return receive;/* 返回数据 */
    029C 9508      RET
_main:
  j                    --> R22
  F_data               --> R20
    029D 9724      SBIW	R28,4
(0040) }
(0041) 
(0042) void main(void)
(0043) {
(0044)    unsigned char F_data=1,j=0;
    029E E041      LDI	R20,1
    029F 2766      CLR	R22
(0045)   // /*
(0046)    LCD_init();
    02A0 DDD4      RCALL	_LCD_init
    02A1 C010      RJMP	0x02B2
(0047)    while(1)
(0048)    {
(0049)    if(!(PINB&0x08))
    02A2 99B3      SBIC	0x16,3
    02A3 C00E      RJMP	0x02B2
(0050)    {
(0051)    SPI_receive_int();
    02A4 DFED      RCALL	_SPI_receive_int
(0052)    F_data=SPI_receive();
    02A5 DFF0      RCALL	_SPI_receive
    02A6 2F40      MOV	R20,R16
(0053)    LCD_write_chang_data(0,0,F_data);
FILE: <library>
    02A7 2E24      MOV	R2,R20
    02A8 2433      CLR	R3
    02A9 2444      CLR	R4
    02AA 2455      CLR	R5
    02AB 8228      STD	Y+0,R2
    02AC 8239      STD	Y+1,R3
    02AD 824A      STD	Y+2,R4
    02AE 825B      STD	Y+3,R5
    02AF 2722      CLR	R18
    02B0 2700      CLR	R16
    02B1 DE8C      RCALL	_LCD_write_chang_data
    02B2 CFEF      RJMP	0x02A2
    02B3 9624      ADIW	R28,4
    02B4 9508      RET
div32u:
    02B5 94E8      BCLR	6
    02B6 C001      RJMP	0x02B8
mod32u:
    02B7 9468      BSET	6
    02B8 D02F      RCALL	long_div_prolog
    02B9 24CC      CLR	R12
    02BA C008      RJMP	0x02C3
div32s:
    02BB 94E8      BCLR	6
    02BC C001      RJMP	0x02BE
mod32s:
    02BD 9468      BSET	6
    02BE D029      RCALL	long_div_prolog
    02BF FD37      SBRC	R19,7
    02C0 D053      RCALL	neg_R16_R19
    02C1 FDB7      SBRC	R27,7
    02C2 D05A      RCALL	neg_R24_R27
    02C3 2477      CLR	R7
    02C4 2488      CLR	R8
    02C5 2499      CLR	R9
    02C6 24AA      CLR	R10
    02C7 24BB      CLR	R11
    02C8 D041      RCALL	tst_R16_R19
    02C9 F0C1      BEQ	0x02E2
    02CA D044      RCALL	tst_R24_R27
    02CB F0B1      BEQ	0x02E2
    02CC E2E8      LDI	R30,0x28
    02CD 0F00      LSL	R16
    02CE 1F11      ROL	R17
    02CF 1F22      ROL	R18
    02D0 1F33      ROL	R19
    02D1 1C77      ROL	R7
    02D2 1C88      ROL	R8
    02D3 1C99      ROL	R9
    02D4 1CAA      ROL	R10
    02D5 1CBB      ROL	R11
    02D6 1688      CP	R8,R24
    02D7 0699      CPC	R9,R25
    02D8 06AA      CPC	R10,R26
    02D9 06BB      CPC	R11,R27
    02DA F028      BCS	0x02E0
    02DB 1A88      SUB	R8,R24
    02DC 0A99      SBC	R9,R25
    02DD 0AAA      SBC	R10,R26
    02DE 0ABB      SBC	R11,R27
    02DF 9503      INC	R16
    02E0 95EA      DEC	R30
    02E1 F759      BNE	0x02CD
    02E2 F426      BRTC	0x02E7
    02E3 2D08      MOV	R16,R8
    02E4 2D19      MOV	R17,R9
    02E5 2D2A      MOV	R18,R10
    02E6 2D3B      MOV	R19,R11
    02E7 C013      RJMP	long_div_epilog
long_div_prolog:
    02E8 927A      ST	R7,-Y
    02E9 928A      ST	R8,-Y
    02EA 929A      ST	R9,-Y
    02EB 92AA      ST	R10,-Y
    02EC 92BA      ST	R11,-Y
    02ED 92CA      ST	R12,-Y
    02EE 93EA      ST	R30,-Y
    02EF 938A      ST	R24,-Y
    02F0 939A      ST	R25,-Y
    02F1 93AA      ST	R26,-Y
    02F2 93BA      ST	R27,-Y
    02F3 858B      LDD	R24,Y+11
    02F4 859C      LDD	R25,Y+12
    02F5 85AD      LDD	R26,Y+13
    02F6 85BE      LDD	R27,Y+14
    02F7 2EC3      MOV	R12,R19
    02F8 F00E      BRTS	0x02FA
    02F9 26CB      EOR	R12,R27
    02FA 9508      RET
long_div_epilog:
    02FB FCC7      SBRC	R12,7
    02FC D017      RCALL	neg_R16_R19
    02FD 91B9      LD	R27,Y+
    02FE 91A9      LD	R26,Y+
    02FF 9199      LD	R25,Y+
    0300 9189      LD	R24,Y+
    0301 91E9      LD	R30,Y+
    0302 90C9      LD	R12,Y+
    0303 90B9      LD	R11,Y+
    0304 90A9      LD	R10,Y+
    0305 9099      LD	R9,Y+
    0306 9089      LD	R8,Y+
    0307 9079      LD	R7,Y+
    0308 9624      ADIW	R28,4
    0309 9508      RET
tst_R16_R19:
    030A 2FE0      MOV	R30,R16
    030B 2BE1      OR	R30,R17
    030C 2BE2      OR	R30,R18
    030D 2BE3      OR	R30,R19
    030E 9508      RET
tst_R24_R27:
    030F 2FE8      MOV	R30,R24
    0310 2BE9      OR	R30,R25
    0311 2BEA      OR	R30,R26
    0312 2BEB      OR	R30,R27
    0313 9508      RET
neg_R16_R19:
    0314 9500      COM	R16
    0315 9510      COM	R17
    0316 9520      COM	R18
    0317 9530      COM	R19
    0318 5F0F      SUBI	R16,0xFF
    0319 4F1F      SBCI	R17,0xFF
    031A 4F2F      SBCI	R18,0xFF
    031B 4F3F      SBCI	R19,0xFF
    031C 9508      RET
neg_R24_R27:
    031D 9580      COM	R24
    031E 9590      COM	R25
    031F 95A0      COM	R26
    0320 95B0      COM	R27
    0321 5F8F      SUBI	R24,0xFF
    0322 4F9F      SBCI	R25,0xFF
    0323 4FAF      SBCI	R26,0xFF
    0324 4FBF      SBCI	R27,0xFF
    0325 9508      RET
pop_gset2:
    0326 E0E2      LDI	R30,2
    0327 940C033B  JMP	pop
pop_gset3:
    0329 E0E4      LDI	R30,4
    032A 940C033B  JMP	pop
pop_gset4:
    032C E0E8      LDI	R30,0x8
    032D 940C033B  JMP	pop
push_gset5:
    032F 92FA      ST	R15,-Y
    0330 92EA      ST	R14,-Y
push_gset4:
    0331 92DA      ST	R13,-Y
    0332 92CA      ST	R12,-Y
push_gset3:
    0333 92BA      ST	R11,-Y
    0334 92AA      ST	R10,-Y
push_gset2:
    0335 937A      ST	R23,-Y
    0336 936A      ST	R22,-Y
push_gset1:
    0337 935A      ST	R21,-Y
    0338 934A      ST	R20,-Y
    0339 9508      RET
pop_gset1:
    033A E0E1      LDI	R30,1
pop:
    033B 9149      LD	R20,Y+
    033C 9159      LD	R21,Y+
    033D FDE0      SBRC	R30,0
    033E 9508      RET
    033F 9169      LD	R22,Y+
    0340 9179      LD	R23,Y+
    0341 FDE1      SBRC	R30,1
    0342 9508      RET
    0343 90A9      LD	R10,Y+
    0344 90B9      LD	R11,Y+
    0345 FDE2      SBRC	R30,2
    0346 9508      RET
    0347 90C9      LD	R12,Y+
    0348 90D9      LD	R13,Y+
    0349 FDE3      SBRC	R30,3
    034A 9508      RET
    034B 90E9      LD	R14,Y+
    034C 90F9      LD	R15,Y+
    034D 9508      RET