buzzer.mfd

Mars-XC2S50-S-Core-V2.0开发板核心板的说明和设计文档

;Imported pterms FB7_11
	# state_FFd1 & !state_FFd2 & !state_FFd3 & 
	clk_div2<0> & !clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	clk_div2<2> & clk_div2<4> & clk_div2<5> & clk_div2<6> & 
	clk_div2<7> & clk_div2<8> & !clk_div2<9> & !clk_div2<12>
;Imported pterms FB7_13
	# state_FFd1 & state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & clk_div2<10> & !clk_div2<11> & !clk_div2<1> & 
	!clk_div2<2> & clk_div2<3> & !clk_div2<4> & clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>
	# state_FFd1 & !state_FFd2 & state_FFd3 & 
	clk_div2<0> & !clk_div2<10> & clk_div2<11> & !clk_div2<1> & 
	!clk_div2<2> & !clk_div2<3> & !clk_div2<4> & clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & !clk_div2<8> & !clk_div2<9> & 
	!clk_div2<12>
	# !state_FFd1 & state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & !clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	!clk_div2<2> & clk_div2<3> & clk_div2<4> & !clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>
	# !state_FFd1 & !state_FFd2 & state_FFd3 & 
	clk_div2<0> & clk_div2<10> & clk_div2<11> & !clk_div2<1> & 
	clk_div2<2> & clk_div2<3> & !clk_div2<4> & !clk_div2<5> & 
	clk_div2<6> & !clk_div2<7> & clk_div2<8> & !clk_div2<9> & 
	!clk_div2<12>
	# !state_FFd1 & !state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	clk_div2<2> & clk_div2<3> & !clk_div2<4> & clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & !clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>;
   clk_div2<6>.CLK = clk;
   clk_div2<6>.AR = !rst;
   clk_div2<6>.CE = clk_div1<0> & !clk_div1<1> & !clk_div1<2> & 
	clk_div1<3>;

MACROCELL | 6 | 16 | clk_div2<7>
ATTRIBUTES | 4326256 | 0
OUTPUTMC | 26 | 6 | 2 | 1 | 13 | 1 | 16 | 6 | 10 | 6 | 8 | 1 | 11 | 6 | 14 | 1 | 14 | 6 | 5 | 6 | 11 | 6 | 16 | 6 | 4 | 1 | 0 | 1 | 9 | 1 | 1 | 1 | 12 | 1 | 15 | 1 | 17 | 6 | 0 | 6 | 1 | 6 | 3 | 6 | 7 | 6 | 9 | 6 | 12 | 6 | 13 | 6 | 17
INPUTS | 23 | clk_div2<0>  | clk_div2<1>  | clk_div2<2>  | clk_div2<3>  | clk_div2<4>  | clk_div2<5>  | clk_div2<6>  | state_FFd1  | state_FFd2  | state_FFd3  | clk_div2<10>  | clk_div2<11>  | clk_div2<7>  | clk_div2<8>  | clk_div2<9>  | clk_div2<12>  | clk  | rst  | clk_div1<0>  | clk_div1<1>  | clk_div1<2>  | clk_div1<3>  | EXP20_.EXP
INPUTMC | 21 | 1 | 13 | 6 | 8 | 1 | 12 | 6 | 14 | 1 | 14 | 6 | 6 | 6 | 11 | 0 | 2 | 0 | 1 | 0 | 0 | 1 | 16 | 6 | 10 | 6 | 16 | 6 | 4 | 1 | 0 | 1 | 9 | 1 | 17 | 1 | 11 | 1 | 2 | 1 | 10 | 6 | 17
INPUTP | 2 | 143 | 79
IMPORTS | 1 | 6 | 17
EQ | 31 | 
   clk_div2<7>.T = clk_div2<0> & clk_div2<1> & clk_div2<2> & 
	clk_div2<3> & clk_div2<4> & clk_div2<5> & clk_div2<6>
	# state_FFd1 & !state_FFd2 & !state_FFd3 & 
	clk_div2<0> & !clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	clk_div2<2> & clk_div2<4> & clk_div2<5> & clk_div2<6> & 
	clk_div2<7> & clk_div2<8> & !clk_div2<9> & !clk_div2<12>
;Imported pterms FB7_18
	# state_FFd1 & state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & clk_div2<10> & !clk_div2<11> & !clk_div2<1> & 
	!clk_div2<2> & clk_div2<3> & !clk_div2<4> & clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>
	# state_FFd1 & !state_FFd2 & state_FFd3 & 
	clk_div2<0> & !clk_div2<10> & clk_div2<11> & !clk_div2<1> & 
	!clk_div2<2> & !clk_div2<3> & !clk_div2<4> & clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & !clk_div2<8> & !clk_div2<9> & 
	!clk_div2<12>
	# !state_FFd1 & state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & !clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	!clk_div2<2> & clk_div2<3> & clk_div2<4> & !clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>
	# !state_FFd1 & !state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	clk_div2<2> & clk_div2<3> & !clk_div2<4> & clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & !clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>;
   clk_div2<7>.CLK = clk;
   clk_div2<7>.AR = !rst;
   clk_div2<7>.CE = clk_div1<0> & !clk_div1<1> & !clk_div1<2> & 
	clk_div1<3>;

MACROCELL | 6 | 4 | clk_div2<8>
ATTRIBUTES | 4326256 | 0
OUTPUTMC | 26 | 6 | 2 | 1 | 13 | 1 | 16 | 6 | 10 | 6 | 8 | 1 | 11 | 6 | 14 | 1 | 14 | 6 | 5 | 6 | 11 | 6 | 16 | 6 | 3 | 1 | 0 | 1 | 9 | 1 | 1 | 1 | 12 | 1 | 15 | 1 | 17 | 6 | 0 | 6 | 1 | 6 | 4 | 6 | 7 | 6 | 9 | 6 | 12 | 6 | 13 | 6 | 17
INPUTS | 23 | clk_div2<0>  | clk_div2<1>  | clk_div2<2>  | clk_div2<3>  | clk_div2<4>  | clk_div2<5>  | clk_div2<6>  | clk_div2<7>  | state_FFd1  | state_FFd2  | state_FFd3  | clk_div2<10>  | clk_div2<11>  | clk_div2<8>  | clk_div2<9>  | clk_div2<12>  | clk  | rst  | clk_div1<0>  | clk_div1<1>  | clk_div1<2>  | clk_div1<3>  | EXP13_.EXP
INPUTMC | 21 | 1 | 13 | 6 | 8 | 1 | 12 | 6 | 14 | 1 | 14 | 6 | 6 | 6 | 11 | 6 | 16 | 0 | 2 | 0 | 1 | 0 | 0 | 1 | 16 | 6 | 10 | 6 | 4 | 1 | 0 | 1 | 9 | 1 | 17 | 1 | 11 | 1 | 2 | 1 | 10 | 6 | 3
INPUTP | 2 | 143 | 79
EXPORTS | 1 | 6 | 5
IMPORTS | 1 | 6 | 3
EQ | 43 | 
   clk_div2<8>.T = clk_div2<0> & clk_div2<1> & clk_div2<2> & 
	clk_div2<3> & clk_div2<4> & clk_div2<5> & clk_div2<6> & 
	clk_div2<7>
;Imported pterms FB7_4
	# state_FFd1 & !state_FFd2 & !state_FFd3 & 
	clk_div2<0> & !clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	clk_div2<2> & clk_div2<4> & clk_div2<5> & clk_div2<6> & 
	clk_div2<7> & clk_div2<8> & !clk_div2<9> & !clk_div2<12>
	# state_FFd1 & state_FFd2 & state_FFd3 & 
	clk_div2<0> & clk_div2<10> & !clk_div2<11> & clk_div2<1> & 
	clk_div2<2> & !clk_div2<3> & clk_div2<4> & clk_div2<5> & 
	clk_div2<6> & !clk_div2<7> & clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>
	# state_FFd1 & state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & clk_div2<10> & !clk_div2<11> & !clk_div2<1> & 
	!clk_div2<2> & clk_div2<3> & !clk_div2<4> & clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>
	# !state_FFd1 & state_FFd2 & state_FFd3 & 
	clk_div2<0> & !clk_div2<10> & clk_div2<11> & !clk_div2<1> & 
	!clk_div2<2> & !clk_div2<3> & clk_div2<4> & clk_div2<5> & 
	!clk_div2<6> & !clk_div2<7> & clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>
	# !state_FFd1 & !state_FFd2 & state_FFd3 & 
	clk_div2<0> & clk_div2<10> & clk_div2<11> & !clk_div2<1> & 
	clk_div2<2> & clk_div2<3> & !clk_div2<4> & !clk_div2<5> & 
	clk_div2<6> & !clk_div2<7> & clk_div2<8> & !clk_div2<9> & 
	!clk_div2<12>
;Imported pterms FB7_3
	# !state_FFd1 & state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & !clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	!clk_div2<2> & clk_div2<3> & clk_div2<4> & !clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>;
   clk_div2<8>.CLK = clk;
   clk_div2<8>.AR = !rst;
   clk_div2<8>.CE = clk_div1<0> & !clk_div1<1> & !clk_div1<2> & 
	clk_div1<3>;
    clk_div2<8>.EXP  =  !state_FFd1 & !state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	clk_div2<2> & clk_div2<3> & !clk_div2<4> & clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & !clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>

MACROCELL | 1 | 0 | clk_div2<9>
ATTRIBUTES | 4326256 | 0
OUTPUTMC | 26 | 6 | 2 | 1 | 13 | 1 | 16 | 6 | 10 | 6 | 8 | 1 | 11 | 6 | 14 | 1 | 14 | 6 | 5 | 6 | 11 | 6 | 16 | 6 | 3 | 1 | 0 | 1 | 9 | 1 | 1 | 1 | 12 | 1 | 15 | 1 | 17 | 6 | 0 | 6 | 1 | 6 | 4 | 6 | 7 | 6 | 9 | 6 | 12 | 6 | 13 | 6 | 17
INPUTS | 23 | clk_div2<0>  | clk_div2<1>  | clk_div2<2>  | clk_div2<3>  | clk_div2<4>  | clk_div2<5>  | clk_div2<6>  | clk_div2<7>  | clk_div2<8>  | state_FFd1  | state_FFd2  | state_FFd3  | clk_div2<10>  | clk_div2<11>  | clk_div2<9>  | clk_div2<12>  | clk  | rst  | clk_div1<0>  | clk_div1<1>  | clk_div1<2>  | clk_div1<3>  | EXP10_.EXP
INPUTMC | 21 | 1 | 13 | 6 | 8 | 1 | 12 | 6 | 14 | 1 | 14 | 6 | 6 | 6 | 11 | 6 | 16 | 6 | 4 | 0 | 2 | 0 | 1 | 0 | 0 | 1 | 16 | 6 | 10 | 1 | 0 | 1 | 9 | 1 | 17 | 1 | 11 | 1 | 2 | 1 | 10 | 1 | 1
INPUTP | 2 | 143 | 79
IMPORTS | 1 | 1 | 1
EQ | 33 | 
   clk_div2<9>.T = clk_div2<0> & clk_div2<1> & clk_div2<2> & 
	clk_div2<3> & clk_div2<4> & clk_div2<5> & clk_div2<6> & 
	clk_div2<7> & clk_div2<8>
	# state_FFd1 & state_FFd2 & state_FFd3 & 
	clk_div2<0> & clk_div2<10> & !clk_div2<11> & clk_div2<1> & 
	clk_div2<2> & !clk_div2<3> & clk_div2<4> & clk_div2<5> & 
	clk_div2<6> & !clk_div2<7> & clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>
;Imported pterms FB2_2
	# state_FFd1 & state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & clk_div2<10> & !clk_div2<11> & !clk_div2<1> & 
	!clk_div2<2> & clk_div2<3> & !clk_div2<4> & clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>
	# !state_FFd1 & state_FFd2 & state_FFd3 & 
	clk_div2<0> & !clk_div2<10> & clk_div2<11> & !clk_div2<1> & 
	!clk_div2<2> & !clk_div2<3> & clk_div2<4> & clk_div2<5> & 
	!clk_div2<6> & !clk_div2<7> & clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>
	# !state_FFd1 & state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & !clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	!clk_div2<2> & clk_div2<3> & clk_div2<4> & !clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>
	# !state_FFd1 & !state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	clk_div2<2> & clk_div2<3> & !clk_div2<4> & clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & !clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>;
   clk_div2<9>.CLK = clk;
   clk_div2<9>.AR = !rst;
   clk_div2<9>.CE = clk_div1<0> & !clk_div1<1> & !clk_div1<2> & 
	clk_div1<3>;

MACROCELL | 1 | 9 | clk_div2<12>
ATTRIBUTES | 4326256 | 0
OUTPUTMC | 26 | 6 | 2 | 1 | 13 | 1 | 16 | 6 | 9 | 6 | 8 | 1 | 11 | 6 | 14 | 1 | 14 | 6 | 5 | 6 | 11 | 6 | 16 | 6 | 3 | 1 | 0 | 1 | 1 | 1 | 12 | 1 | 15 | 1 | 17 | 6 | 0 | 6 | 1 | 6 | 4 | 6 | 7 | 6 | 10 | 6 | 12 | 6 | 13 | 6 | 17 | 1 | 10
INPUTS | 18 | clk_div2<0>  | clk_div2<10>  | clk_div2<11>  | clk_div2<1>  | clk_div2<2>  | clk_div2<3>  | clk_div2<4>  | clk_div2<5>  | clk_div2<6>  | clk_div2<7>  | clk_div2<8>  | clk_div2<9>  | clk  | rst  | clk_div1<0>  | clk_div1<1>  | clk_div1<2>  | clk_div1<3>
INPUTMC | 16 | 1 | 13 | 1 | 16 | 6 | 10 | 6 | 8 | 1 | 12 | 6 | 14 | 1 | 14 | 6 | 6 | 6 | 11 | 6 | 16 | 6 | 4 | 1 | 0 | 1 | 17 | 1 | 11 | 1 | 2 | 1 | 10
INPUTP | 2 | 143 | 79
EXPORTS | 1 | 1 | 10
EQ | 9 | 
   clk_div2<12>.T = clk_div2<0> & clk_div2<10> & clk_div2<11> & 
	clk_div2<1> & clk_div2<2> & clk_div2<3> & clk_div2<4> & 
	clk_div2<5> & clk_div2<6> & clk_div2<7> & clk_div2<8> & 
	clk_div2<9>;
   clk_div2<12>.CLK = clk;
   clk_div2<12>.AR = !rst;
   clk_div2<12>.CE = clk_div1<0> & !clk_div1<1> & !clk_div1<2> & 
	clk_div1<3>;
    clk_div2<12>.EXP  =  clk_div1<0> & clk_div1<1> & clk_div1<2>

MACROCELL | 1 | 15 | cnt<0>
ATTRIBUTES | 4326256 | 0
OUTPUTMC | 25 | 0 | 2 | 0 | 1 | 0 | 0 | 0 | 17 | 0 | 16 | 0 | 15 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 10 | 0 | 9 | 0 | 8 | 1 | 8 | 0 | 7 | 1 | 7 | 1 | 6 | 1 | 5 | 1 | 4 | 1 | 3 | 0 | 5 | 0 | 4 | 0 | 3 | 0 | 6 | 1 | 14
INPUTS | 22 | clk  | rst  | clk_div1<0>  | clk_div1<1>  | clk_div1<2>  | clk_div1<3>  | state_FFd1  | state_FFd2  | state_FFd3  | clk_div2<0>  | clk_div2<10>  | clk_div2<11>  | clk_div2<1>  | clk_div2<2>  | clk_div2<3>  | clk_div2<4>  | clk_div2<5>  | clk_div2<6>  | clk_div2<7>  | clk_div2<8>  | clk_div2<9>  | clk_div2<12>
INPUTMC | 20 | 1 | 17 | 1 | 11 | 1 | 2 | 1 | 10 | 0 | 2 | 0 | 1 | 0 | 0 | 1 | 13 | 1 | 16 | 6 | 10 | 6 | 8 | 1 | 12 | 6 | 14 | 1 | 14 | 6 | 6 | 6 | 11 | 6 | 16 | 6 | 4 | 1 | 0 | 1 | 9
INPUTP | 2 | 143 | 79
EXPORTS | 1 | 1 | 14
EQ | 15 | 
   cnt<0>.T = Vcc;
   cnt<0>.CLK = clk;
   cnt<0>.AR = !rst;
   cnt<0>.CE = clk_div1<0> & !clk_div1<1> & !clk_div1<2> & 
	clk_div1<3>;
    cnt<0>.EXP  =  !state_FFd1 & state_FFd2 & state_FFd3 & 
	clk_div2<0> & !clk_div2<10> & clk_div2<11> & !clk_div2<1> & 
	!clk_div2<2> & !clk_div2<3> & clk_div2<4> & clk_div2<5> & 
	!clk_div2<6> & !clk_div2<7> & clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>
	# !state_FFd1 & state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & !clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	!clk_div2<2> & clk_div2<3> & clk_div2<4> & !clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>

MACROCELL | 0 | 17 | cnt<10>
ATTRIBUTES | 4326256 | 0
OUTPUTMC | 14 | 0 | 2 | 0 | 1 | 0 | 0 | 0 | 16 | 0 | 15 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 10 | 0 | 9 | 0 | 8 | 0 | 7 | 0 | 6
INPUTS | 16 | cnt<0>  | cnt<1>  | cnt<2>  | cnt<3>  | cnt<4>  | cnt<5>  | cnt<6>  | cnt<7>  | cnt<8>  | cnt<9>  | clk  | rst  | clk_div1<0>  | clk_div1<1>  | clk_div1<2>  | clk_div1<3>
INPUTMC | 14 | 1 | 15 | 1 | 8 | 1 | 7 | 1 | 6 | 1 | 5 | 1 | 4 | 1 | 3 | 0 | 5 | 0 | 4 | 0 | 3 | 1 | 17 | 1 | 11 | 1 | 2 | 1 | 10
INPUTP | 2 | 143 | 79
EQ | 6 | 
   cnt<10>.T = cnt<0> & cnt<1> & cnt<2> & cnt<3> & cnt<4> & 
	cnt<5> & cnt<6> & cnt<7> & cnt<8> & cnt<9>;
   cnt<10>.CLK = clk;
   cnt<10>.AR = !rst;
   cnt<10>.CE = clk_div1<0> & !clk_div1<1> & !clk_div1<2> & 
	clk_div1<3>;