buzzer.mfd

Mars-XC2S50-S-Core-V2.0开发板核心板的说明和设计文档

	!clk_div2<12>;
   clk_div2<11>.CLK = clk;
   clk_div2<11>.AR = !rst;
   clk_div2<11>.CE = clk_div1<0> & !clk_div1<1> & !clk_div1<2> & 
	clk_div1<3>;
    clk_div2<11>.EXP  =  state_FFd1 & !state_FFd2 & !state_FFd3 & 
	clk_div2<0> & !clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	clk_div2<2> & clk_div2<4> & clk_div2<5> & clk_div2<6> & 
	clk_div2<7> & clk_div2<8> & !clk_div2<9> & !clk_div2<12>

MACROCELL | 6 | 8 | clk_div2<1>
ATTRIBUTES | 8520560 | 0
OUTPUTMC | 27 | 6 | 2 | 1 | 13 | 1 | 16 | 6 | 10 | 6 | 7 | 1 | 11 | 6 | 13 | 1 | 14 | 6 | 6 | 6 | 11 | 6 | 16 | 6 | 4 | 1 | 0 | 1 | 9 | 1 | 1 | 1 | 12 | 1 | 15 | 1 | 17 | 6 | 0 | 6 | 1 | 6 | 3 | 6 | 5 | 6 | 8 | 6 | 9 | 6 | 12 | 6 | 15 | 6 | 17
INPUTS | 23 | state_FFd1  | state_FFd2  | state_FFd3  | clk_div2<0>  | clk_div2<10>  | clk_div2<11>  | clk_div2<2>  | clk_div2<3>  | clk_div2<4>  | clk_div2<5>  | clk_div2<6>  | clk_div2<7>  | clk_div2<8>  | clk_div2<9>  | clk_div2<12>  | clk_div2<1>  | clk  | rst  | clk_div1<0>  | clk_div1<1>  | clk_div1<2>  | clk_div1<3>  | EXP15_.EXP
INPUTMC | 21 | 0 | 2 | 0 | 1 | 0 | 0 | 1 | 13 | 1 | 16 | 6 | 10 | 1 | 12 | 6 | 14 | 1 | 14 | 6 | 6 | 6 | 11 | 6 | 16 | 6 | 4 | 1 | 0 | 1 | 9 | 6 | 8 | 1 | 17 | 1 | 11 | 1 | 2 | 1 | 10 | 6 | 7
INPUTP | 2 | 143 | 79
EXPORTS | 1 | 6 | 9
IMPORTS | 1 | 6 | 7
EQ | 33 | 
   !clk_div2<1>.D = !state_FFd1 & state_FFd2 & state_FFd3 & 
	clk_div2<0> & !clk_div2<10> & clk_div2<11> & !clk_div2<2> & 
	!clk_div2<3> & clk_div2<4> & clk_div2<5> & !clk_div2<6> & 
	!clk_div2<7> & clk_div2<8> & clk_div2<9> & !clk_div2<12>
;Imported pterms FB7_8
	# clk_div2<0> & clk_div2<1>
	# state_FFd1 & !state_FFd2 & state_FFd3 & 
	clk_div2<0> & !clk_div2<10> & clk_div2<11> & !clk_div2<2> & 
	!clk_div2<3> & !clk_div2<4> & clk_div2<5> & clk_div2<6> & 
	clk_div2<7> & !clk_div2<8> & !clk_div2<9> & !clk_div2<12>
	# !state_FFd1 & state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & !clk_div2<10> & clk_div2<11> & !clk_div2<2> & 
	clk_div2<3> & clk_div2<4> & !clk_div2<5> & clk_div2<6> & 
	clk_div2<7> & clk_div2<8> & clk_div2<9> & !clk_div2<12>
	# !state_FFd1 & !state_FFd2 & state_FFd3 & 
	clk_div2<0> & clk_div2<10> & clk_div2<11> & clk_div2<2> & 
	clk_div2<3> & !clk_div2<4> & !clk_div2<5> & clk_div2<6> & 
	!clk_div2<7> & clk_div2<8> & !clk_div2<9> & !clk_div2<12>
	# !state_FFd1 & !state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & clk_div2<10> & clk_div2<11> & clk_div2<2> & 
	clk_div2<3> & !clk_div2<4> & clk_div2<5> & clk_div2<6> & 
	clk_div2<7> & !clk_div2<8> & clk_div2<9> & !clk_div2<12>
;Imported pterms FB7_7
	# !clk_div2<0> & !clk_div2<1>;
   clk_div2<1>.CLK = clk;
   clk_div2<1>.AR = !rst;
   clk_div2<1>.CE = clk_div1<0> & !clk_div1<1> & !clk_div1<2> & 
	clk_div1<3>;
    clk_div2<1>.EXP  =  !state_FFd1 & !state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	clk_div2<2> & clk_div2<3> & !clk_div2<4> & clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & !clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>

MACROCELL | 1 | 12 | clk_div2<2>
ATTRIBUTES | 4326256 | 0
OUTPUTMC | 28 | 6 | 2 | 1 | 13 | 1 | 16 | 6 | 10 | 6 | 8 | 1 | 11 | 6 | 14 | 1 | 14 | 6 | 6 | 6 | 11 | 6 | 16 | 6 | 4 | 1 | 0 | 1 | 9 | 1 | 1 | 1 | 12 | 1 | 15 | 1 | 17 | 6 | 0 | 6 | 1 | 6 | 3 | 6 | 5 | 6 | 7 | 6 | 9 | 6 | 12 | 6 | 13 | 6 | 15 | 6 | 17
INPUTS | 23 | state_FFd1  | state_FFd2  | state_FFd3  | clk_div2<0>  | clk_div2<10>  | clk_div2<11>  | clk_div2<1>  | clk_div2<2>  | clk_div2<3>  | clk_div2<4>  | clk_div2<5>  | clk_div2<6>  | clk_div2<7>  | clk_div2<8>  | clk_div2<9>  | clk_div2<12>  | clk  | rst  | clk_div1<0>  | clk_div1<1>  | clk_div1<2>  | clk_div1<3>  | clk_div1<1>.EXP
INPUTMC | 21 | 0 | 2 | 0 | 1 | 0 | 0 | 1 | 13 | 1 | 16 | 6 | 10 | 6 | 8 | 1 | 12 | 6 | 14 | 1 | 14 | 6 | 6 | 6 | 11 | 6 | 16 | 6 | 4 | 1 | 0 | 1 | 9 | 1 | 17 | 1 | 11 | 1 | 2 | 1 | 10 | 1 | 11
INPUTP | 2 | 143 | 79
EXPORTS | 1 | 1 | 13
IMPORTS | 1 | 1 | 11
EQ | 24 | 
   clk_div2<2>.T = ;Imported pterms FB2_12
	  clk_div2<0> & clk_div2<1>
	# !state_FFd1 & !state_FFd2 & state_FFd3 & 
	clk_div2<0> & clk_div2<10> & clk_div2<11> & clk_div2<2> & 
	clk_div2<3> & !clk_div2<4> & !clk_div2<5> & clk_div2<6> & 
	!clk_div2<7> & clk_div2<8> & !clk_div2<9> & !clk_div2<12>
	# !state_FFd1 & !state_FFd2 & !state_FFd3 & 
	clk_div2<10> & clk_div2<11> & clk_div2<1> & clk_div2<2> & 
	clk_div2<3> & !clk_div2<4> & clk_div2<5> & clk_div2<6> & 
	clk_div2<7> & !clk_div2<8> & clk_div2<9> & !clk_div2<12>;
   clk_div2<2>.CLK = clk;
   clk_div2<2>.AR = !rst;
   clk_div2<2>.CE = clk_div1<0> & !clk_div1<1> & !clk_div1<2> & 
	clk_div1<3>;
    clk_div2<2>.EXP  =  !state_FFd1 & state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & !clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	!clk_div2<2> & clk_div2<3> & clk_div2<4> & !clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>
	# !state_FFd1 & !state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	clk_div2<2> & clk_div2<3> & !clk_div2<4> & clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & !clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>

MACROCELL | 6 | 14 | clk_div2<3>
ATTRIBUTES | 8520560 | 0
OUTPUTMC | 28 | 6 | 2 | 1 | 13 | 1 | 16 | 6 | 10 | 6 | 8 | 1 | 11 | 6 | 14 | 1 | 14 | 6 | 6 | 6 | 11 | 6 | 16 | 6 | 4 | 1 | 0 | 1 | 9 | 1 | 1 | 1 | 12 | 1 | 15 | 1 | 17 | 6 | 0 | 6 | 1 | 6 | 3 | 6 | 5 | 6 | 7 | 6 | 9 | 6 | 12 | 6 | 13 | 6 | 15 | 6 | 17
INPUTS | 23 | state_FFd1  | state_FFd2  | state_FFd3  | clk_div2<0>  | clk_div2<10>  | clk_div2<11>  | clk_div2<2>  | clk_div2<3>  | clk_div2<4>  | clk_div2<5>  | clk_div2<6>  | clk_div2<7>  | clk_div2<8>  | clk_div2<9>  | clk_div2<12>  | EXP18_.EXP  | clk  | rst  | clk_div1<0>  | clk_div1<1>  | clk_div1<2>  | clk_div1<3>  | EXP19_.EXP
INPUTMC | 21 | 0 | 2 | 0 | 1 | 0 | 0 | 1 | 13 | 1 | 16 | 6 | 10 | 1 | 12 | 6 | 14 | 1 | 14 | 6 | 6 | 6 | 11 | 6 | 16 | 6 | 4 | 1 | 0 | 1 | 9 | 6 | 13 | 1 | 17 | 1 | 11 | 1 | 2 | 1 | 10 | 6 | 15
INPUTP | 2 | 143 | 79
IMPORTS | 2 | 6 | 13 | 6 | 15
EQ | 35 | 
   !clk_div2<3>.D = state_FFd1 & state_FFd2 & state_FFd3 & 
	clk_div2<10> & !clk_div2<11> & !clk_div2<3> & clk_div2<4> & 
	clk_div2<5> & clk_div2<6> & !clk_div2<7> & clk_div2<8> & 
	clk_div2<9> & !clk_div2<12>
	# !state_FFd1 & !state_FFd2 & state_FFd3 & 
	clk_div2<0> & clk_div2<10> & clk_div2<11> & clk_div2<2> & 
	clk_div2<3> & !clk_div2<4> & !clk_div2<5> & clk_div2<6> & 
	!clk_div2<7> & clk_div2<8> & !clk_div2<9> & !clk_div2<12>
;Imported pterms FB7_14
	# !clk_div2<1> & !clk_div2<3>
	# state_FFd1 & !state_FFd2 & !state_FFd3 & 
	!clk_div2<10> & clk_div2<11> & !clk_div2<3> & clk_div2<4> & 
	clk_div2<5> & clk_div2<6> & clk_div2<7> & clk_div2<8> & 
	!clk_div2<9> & !clk_div2<12>
	# state_FFd1 & state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & clk_div2<10> & !clk_div2<11> & !clk_div2<1> & 
	!clk_div2<2> & !clk_div2<4> & clk_div2<5> & clk_div2<6> & 
	clk_div2<7> & clk_div2<8> & clk_div2<9> & !clk_div2<12>
	# !state_FFd1 & state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & !clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	!clk_div2<2> & clk_div2<4> & !clk_div2<5> & clk_div2<6> & 
	clk_div2<7> & clk_div2<8> & clk_div2<9> & !clk_div2<12>
	# !state_FFd1 & !state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	clk_div2<2> & !clk_div2<4> & clk_div2<5> & clk_div2<6> & 
	clk_div2<7> & !clk_div2<8> & clk_div2<9> & !clk_div2<12>
;Imported pterms FB7_16
	# !clk_div2<0> & !clk_div2<3>
	# !clk_div2<2> & !clk_div2<3>
	# clk_div2<0> & clk_div2<1> & clk_div2<2> & 
	clk_div2<3>;
   clk_div2<3>.CLK = clk;
   clk_div2<3>.AR = !rst;
   clk_div2<3>.CE = clk_div1<0> & !clk_div1<1> & !clk_div1<2> & 
	clk_div1<3>;

MACROCELL | 1 | 14 | clk_div2<4>
ATTRIBUTES | 4326256 | 0
OUTPUTMC | 27 | 6 | 2 | 1 | 13 | 1 | 16 | 6 | 10 | 6 | 8 | 1 | 11 | 6 | 14 | 1 | 14 | 6 | 6 | 6 | 11 | 6 | 16 | 6 | 4 | 1 | 0 | 1 | 9 | 1 | 1 | 1 | 12 | 1 | 15 | 1 | 17 | 6 | 0 | 6 | 1 | 6 | 3 | 6 | 5 | 6 | 7 | 6 | 9 | 6 | 12 | 6 | 13 | 6 | 17
INPUTS | 24 | clk_div2<0>  | clk_div2<1>  | clk_div2<2>  | clk_div2<3>  | state_FFd1  | state_FFd2  | state_FFd3  | clk_div2<10>  | clk_div2<11>  | clk_div2<4>  | clk_div2<5>  | clk_div2<6>  | clk_div2<7>  | clk_div2<8>  | clk_div2<9>  | clk_div2<12>  | clk  | rst  | clk_div1<0>  | clk_div1<1>  | clk_div1<2>  | clk_div1<3>  | clk_div2<0>.EXP  | cnt<0>.EXP
INPUTMC | 22 | 1 | 13 | 6 | 8 | 1 | 12 | 6 | 14 | 0 | 2 | 0 | 1 | 0 | 0 | 1 | 16 | 6 | 10 | 1 | 14 | 6 | 6 | 6 | 11 | 6 | 16 | 6 | 4 | 1 | 0 | 1 | 9 | 1 | 17 | 1 | 11 | 1 | 2 | 1 | 10 | 1 | 13 | 1 | 15
INPUTP | 2 | 143 | 79
IMPORTS | 2 | 1 | 13 | 1 | 15
EQ | 26 | 
   clk_div2<4>.T = clk_div2<0> & clk_div2<1> & clk_div2<2> & 
	clk_div2<3>
	# state_FFd1 & state_FFd2 & state_FFd3 & 
	clk_div2<0> & clk_div2<10> & !clk_div2<11> & clk_div2<1> & 
	clk_div2<2> & clk_div2<4> & clk_div2<5> & clk_div2<6> & 
	!clk_div2<7> & clk_div2<8> & clk_div2<9> & !clk_div2<12>
;Imported pterms FB2_14
	# state_FFd1 & !state_FFd2 & !state_FFd3 & 
	clk_div2<0> & !clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	clk_div2<2> & clk_div2<4> & clk_div2<5> & clk_div2<6> & 
	clk_div2<7> & clk_div2<8> & !clk_div2<9> & !clk_div2<12>
;Imported pterms FB2_16
	# !state_FFd1 & state_FFd2 & state_FFd3 & 
	clk_div2<0> & !clk_div2<10> & clk_div2<11> & !clk_div2<1> & 
	!clk_div2<2> & !clk_div2<3> & clk_div2<4> & clk_div2<5> & 
	!clk_div2<6> & !clk_div2<7> & clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>
	# !state_FFd1 & state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & !clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	!clk_div2<2> & clk_div2<3> & clk_div2<4> & !clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>;
   clk_div2<4>.CLK = clk;
   clk_div2<4>.AR = !rst;
   clk_div2<4>.CE = clk_div1<0> & !clk_div1<1> & !clk_div1<2> & 
	clk_div1<3>;

MACROCELL | 6 | 6 | clk_div2<5>
ATTRIBUTES | 4326256 | 0
OUTPUTMC | 26 | 6 | 2 | 1 | 13 | 1 | 16 | 6 | 10 | 6 | 8 | 1 | 11 | 6 | 14 | 1 | 14 | 6 | 5 | 6 | 11 | 6 | 16 | 6 | 4 | 1 | 0 | 1 | 9 | 1 | 1 | 1 | 12 | 1 | 15 | 1 | 17 | 6 | 0 | 6 | 1 | 6 | 3 | 6 | 7 | 6 | 9 | 6 | 12 | 6 | 13 | 6 | 17
INPUTS | 12 | clk_div2<0>  | clk_div2<1>  | clk_div2<2>  | clk_div2<3>  | clk_div2<4>  | EXP14_.EXP  | clk  | rst  | clk_div1<0>  | clk_div1<1>  | clk_div1<2>  | clk_div1<3>
INPUTMC | 10 | 1 | 13 | 6 | 8 | 1 | 12 | 6 | 14 | 1 | 14 | 6 | 5 | 1 | 17 | 1 | 11 | 1 | 2 | 1 | 10
INPUTP | 2 | 143 | 79
EXPORTS | 1 | 6 | 7
IMPORTS | 1 | 6 | 5
EQ | 37 | 
   clk_div2<5>.T = clk_div2<0> & clk_div2<1> & clk_div2<2> & 
	clk_div2<3> & clk_div2<4>
;Imported pterms FB7_6
	# state_FFd1 & state_FFd2 & state_FFd3 & 
	clk_div2<0> & clk_div2<10> & !clk_div2<11> & clk_div2<1> & 
	clk_div2<2> & clk_div2<4> & clk_div2<5> & clk_div2<6> & 
	!clk_div2<7> & clk_div2<8> & clk_div2<9> & !clk_div2<12>
	# state_FFd1 & !state_FFd2 & !state_FFd3 & 
	clk_div2<0> & !clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	clk_div2<2> & clk_div2<4> & clk_div2<5> & clk_div2<6> & 
	clk_div2<7> & clk_div2<8> & !clk_div2<9> & !clk_div2<12>
	# state_FFd1 & state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & clk_div2<10> & !clk_div2<11> & !clk_div2<1> & 
	!clk_div2<2> & clk_div2<3> & !clk_div2<4> & clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>
	# state_FFd1 & !state_FFd2 & state_FFd3 & 
	clk_div2<0> & !clk_div2<10> & clk_div2<11> & !clk_div2<1> & 
	!clk_div2<2> & !clk_div2<3> & !clk_div2<4> & clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & !clk_div2<8> & !clk_div2<9> & 
	!clk_div2<12>
	# !state_FFd1 & state_FFd2 & state_FFd3 & 
	clk_div2<0> & !clk_div2<10> & clk_div2<11> & !clk_div2<1> & 
	!clk_div2<2> & !clk_div2<3> & clk_div2<4> & clk_div2<5> & 
	!clk_div2<6> & !clk_div2<7> & clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>
;Imported pterms FB7_5
	# !state_FFd1 & !state_FFd2 & !state_FFd3 & 
	!clk_div2<0> & clk_div2<10> & clk_div2<11> & clk_div2<1> & 
	clk_div2<2> & clk_div2<3> & !clk_div2<4> & clk_div2<5> & 
	clk_div2<6> & clk_div2<7> & !clk_div2<8> & clk_div2<9> & 
	!clk_div2<12>;
   clk_div2<5>.CLK = clk;
   clk_div2<5>.AR = !rst;
   clk_div2<5>.CE = clk_div1<0> & !clk_div1<1> & !clk_div1<2> & 
	clk_div1<3>;
    clk_div2<5>.EXP  =  !clk_div2<0> & !clk_div2<1>

MACROCELL | 6 | 11 | clk_div2<6>
ATTRIBUTES | 4326256 | 0
OUTPUTMC | 26 | 6 | 2 | 1 | 13 | 1 | 16 | 6 | 10 | 6 | 8 | 1 | 11 | 6 | 14 | 1 | 14 | 6 | 5 | 6 | 11 | 6 | 16 | 6 | 4 | 1 | 0 | 1 | 9 | 1 | 1 | 1 | 12 | 1 | 15 | 1 | 17 | 6 | 0 | 6 | 1 | 6 | 3 | 6 | 7 | 6 | 9 | 6 | 12 | 6 | 13 | 6 | 17
INPUTS | 24 | clk_div2<0>  | clk_div2<1>  | clk_div2<2>  | clk_div2<3>  | clk_div2<4>  | clk_div2<5>  | state_FFd1  | state_FFd2  | state_FFd3  | clk_div2<10>  | clk_div2<11>  | clk_div2<6>  | clk_div2<7>  | clk_div2<8>  | clk_div2<9>  | clk_div2<12>  | clk  | rst  | clk_div1<0>  | clk_div1<1>  | clk_div1<2>  | clk_div1<3>  | clk_div2<11>.EXP  | EXP17_.EXP
INPUTMC | 22 | 1 | 13 | 6 | 8 | 1 | 12 | 6 | 14 | 1 | 14 | 6 | 6 | 0 | 2 | 0 | 1 | 0 | 0 | 1 | 16 | 6 | 10 | 6 | 11 | 6 | 16 | 6 | 4 | 1 | 0 | 1 | 9 | 1 | 17 | 1 | 11 | 1 | 2 | 1 | 10 | 6 | 10 | 6 | 12
INPUTP | 2 | 143 | 79
IMPORTS | 2 | 6 | 10 | 6 | 12
EQ | 41 | 
   clk_div2<6>.T = clk_div2<0> & clk_div2<1> & clk_div2<2> & 
	clk_div2<3> & clk_div2<4> & clk_div2<5>
	# state_FFd1 & state_FFd2 & state_FFd3 & 
	clk_div2<0> & clk_div2<10> & !clk_div2<11> & clk_div2<1> & 
	clk_div2<2> & clk_div2<4> & clk_div2<5> & clk_div2<6> & 
	!clk_div2<7> & clk_div2<8> & clk_div2<9> & !clk_div2<12>