vga.vm6

Mars-XC2S50-S-Core-V2.0开发板核心板的说明和设计文档

INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<0> | 3374 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<0>.Q | ll<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<1> | 3376 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<1>.Q | ll<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<7> | 3360 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<7>.Q | ll<7> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<8> | 3364 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<8>.Q | ll<8> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cc<4> | 3356 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | cc<4>.Q | cc<4> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | ll<7>.D1 | 3432 | ? | 0 | 4096 | ll<7> | NULL | NULL | ll<7>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | ll<7>.D2 | 3433 | ? | 0 | 4096 | ll<7> | NULL | NULL | ll<7>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 7 | IV_TRUE | ll<5> | IV_TRUE | ll<6> | IV_TRUE | ll<4> | IV_TRUE | ll<3> | IV_TRUE | ll<2> | IV_TRUE | ll<0> | IV_TRUE | ll<1>
SPPTERM | 9 | IV_TRUE | ll<5> | IV_TRUE | ll<6> | IV_TRUE | ll<7> | IV_FALSE | ll<4> | IV_TRUE | ll<8> | IV_FALSE | ll<3> | IV_FALSE | ll<2> | IV_TRUE | ll<0> | IV_FALSE | ll<1>
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | ll<7>.CLKF | 3434 | ? | 0 | 4096 | ll<7> | NULL | NULL | ll<7>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_FALSE | cc<4>

SRFF_INSTANCE | ll<7>.REG | ll<7> | 0 | 2 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | ll<7>.D | 3431 | ? | 0 | 0 | ll<7> | NULL | NULL | ll<7>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | ll<7>.CLKF | 3434 | ? | 0 | 4096 | ll<7> | NULL | NULL | ll<7>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_FALSE | cc<4>
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | ll<7>.Q | 3435 | ? | 0 | 0 | ll<7> | NULL | NULL | ll<7>.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | PrldLow+OptxMapped | mmd<1> | vga_COPY_0_COPY_0 | 2155873280 | 3 | 1
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | mmd<1> | 3362 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | mmd<1>.Q | mmd<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | mmd<0> | 3367 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | mmd<0>.Q | mmd<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | orient_IBUF | 3361 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | NULL | orient_IBUF | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | mmd<1> | 3362 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | mmd<1>.Q | mmd<1> | 1 | 0 | MC_UIM

SIGNAL_INSTANCE | mmd<1>.SI | mmd<1> | 0 | 3 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | mmd<1> | 3362 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | mmd<1>.Q | mmd<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | mmd<0> | 3367 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | mmd<0>.Q | mmd<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | orient_IBUF | 3361 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | NULL | orient_IBUF | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | mmd<1>.D1 | 3437 | ? | 0 | 4096 | mmd<1> | NULL | NULL | mmd<1>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | mmd<1>.D2 | 3438 | ? | 0 | 4096 | mmd<1> | NULL | NULL | mmd<1>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 2 | IV_FALSE | mmd<1> | IV_TRUE | mmd<0>
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | mmd<1>.CLKF | 3439 | ? | 0 | 4096 | mmd<1> | NULL | NULL | mmd<1>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_FALSE | orient_IBUF

SRFF_INSTANCE | mmd<1>.REG | mmd<1> | 0 | 2 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | mmd<1>.D | 3436 | ? | 0 | 0 | mmd<1> | NULL | NULL | mmd<1>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | mmd<1>.CLKF | 3439 | ? | 0 | 4096 | mmd<1> | NULL | NULL | mmd<1>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_FALSE | orient_IBUF
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | mmd<1>.Q | 3440 | ? | 0 | 0 | mmd<1> | NULL | NULL | mmd<1>.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | ll<4> | vga_COPY_0_COPY_0 | 2155877376 | 5 | 1
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<3> | 3366 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<3>.Q | ll<3> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<2> | 3370 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<2>.Q | ll<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<0> | 3374 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<0>.Q | ll<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<1> | 3376 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<1>.Q | ll<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cc<4> | 3356 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | cc<4>.Q | cc<4> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | ll<4> | 3363 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<4>.Q | ll<4> | 1 | 0 | MC_UIM

SIGNAL_INSTANCE | ll<4>.SI | ll<4> | 0 | 5 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<3> | 3366 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<3>.Q | ll<3> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<2> | 3370 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<2>.Q | ll<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<0> | 3374 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<0>.Q | ll<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<1> | 3376 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<1>.Q | ll<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cc<4> | 3356 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | cc<4>.Q | cc<4> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | ll<4>.D1 | 3442 | ? | 0 | 4096 | ll<4> | NULL | NULL | ll<4>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | ll<4>.D2 | 3443 | ? | 0 | 4096 | ll<4> | NULL | NULL | ll<4>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 4 | IV_TRUE | ll<3> | IV_TRUE | ll<2> | IV_TRUE | ll<0> | IV_TRUE | ll<1>
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | ll<4>.CLKF | 3444 | ? | 0 | 4096 | ll<4> | NULL | NULL | ll<4>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_FALSE | cc<4>

SRFF_INSTANCE | ll<4>.REG | ll<4> | 0 | 2 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | ll<4>.D | 3441 | ? | 0 | 0 | ll<4> | NULL | NULL | ll<4>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | ll<4>.CLKF | 3444 | ? | 0 | 4096 | ll<4> | NULL | NULL | ll<4>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_FALSE | cc<4>
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | ll<4>.Q | 3445 | ? | 0 | 0 | ll<4> | NULL | NULL | ll<4>.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | ll<8> | vga_COPY_0_COPY_0 | 2155877376 | 10 | 1
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<5> | 3358 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<5>.Q | ll<5> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<6> | 3359 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<6>.Q | ll<6> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<7> | 3360 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<7>.Q | ll<7> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<4> | 3363 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<4>.Q | ll<4> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<3> | 3366 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<3>.Q | ll<3> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<2> | 3370 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<2>.Q | ll<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<0> | 3374 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<0>.Q | ll<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<1> | 3376 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<1>.Q | ll<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<8> | 3364 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<8>.Q | ll<8> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cc<4> | 3356 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | cc<4>.Q | cc<4> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | ll<8> | 3364 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<8>.Q | ll<8> | 1 | 0 | MC_UIM

SIGNAL_INSTANCE | ll<8>.SI | ll<8> | 0 | 10 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<5> | 3358 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<5>.Q | ll<5> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<6> | 3359 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<6>.Q | ll<6> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<7> | 3360 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<7>.Q | ll<7> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<4> | 3363 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<4>.Q | ll<4> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<3> | 3366 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<3>.Q | ll<3> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<2> | 3370 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<2>.Q | ll<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<0> | 3374 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<0>.Q | ll<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<1> | 3376 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<1>.Q | ll<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<8> | 3364 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<8>.Q | ll<8> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cc<4> | 3356 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | cc<4>.Q | cc<4> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | ll<8>.D1 | 3447 | ? | 0 | 4096 | ll<8> | NULL | NULL | ll<8>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | ll<8>.D2 | 3448 | ? | 0 | 4096 | ll<8> | NULL | NULL | ll<8>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 8 | IV_TRUE | ll<5> | IV_TRUE | ll<6> | IV_TRUE | ll<7> | IV_TRUE | ll<4> | IV_TRUE | ll<3> | IV_TRUE | ll<2> | IV_TRUE | ll<0> | IV_TRUE | ll<1>
SPPTERM | 9 | IV_TRUE | ll<5> | IV_TRUE | ll<6> | IV_TRUE | ll<7> | IV_FALSE | ll<4> | IV_TRUE | ll<8> | IV_FALSE | ll<3> | IV_FALSE | ll<2> | IV_TRUE | ll<0> | IV_FALSE | ll<1>
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | ll<8>.CLKF | 3449 | ? | 0 | 4096 | ll<8> | NULL | NULL | ll<8>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_FALSE | cc<4>

SRFF_INSTANCE | ll<8>.REG | ll<8> | 0 | 2 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | ll<8>.D | 3446 | ? | 0 | 0 | ll<8> | NULL | NULL | ll<8>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | ll<8>.CLKF | 3449 | ? | 0 | 4096 | ll<8> | NULL | NULL | ll<8>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_FALSE | cc<4>
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | ll<8>.Q | 3450 | ? | 0 | 0 | ll<8> | NULL | NULL | ll<8>.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cc<1> | vga_COPY_0_COPY_0 | 2155877376 | 2 | 1
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cc<0> | 3369 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | cc<0>.Q | cc<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | fs<2> | 3371 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | fs<2>.Q | fs<2> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | cc<1> | 3365 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | cc<1>.Q | cc<1> | 1 | 0 | MC_UIM

SIGNAL_INSTANCE | cc<1>.SI | cc<1> | 0 | 2 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cc<0> | 3369 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | cc<0>.Q | cc<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | fs<2> | 3371 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | fs<2>.Q | fs<2> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | cc<1>.D1 | 3452 | ? | 0 | 0 | cc<1> | NULL | NULL | cc<1>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | cc<1>.D2 | 3453 | ? | 0 | 4096 | cc<1> | NULL | NULL | cc<1>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_TRUE | cc<0>
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | cc<1>.CLKF | 3454 | ? | 0 | 4096 | cc<1> | NULL | NULL | cc<1>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | fs<2>

SRFF_INSTANCE | cc<1>.REG | cc<1> | 0 | 2 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | cc<1>.D | 3451 | ? | 0 | 0 | cc<1> | NULL | NULL | cc<1>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | cc<1>.CLKF | 3454 | ? | 0 | 4096 | cc<1> | NULL | NULL | cc<1>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | fs<2>
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | cc<1>.Q | 3455 | ? | 0 | 0 | cc<1> | NULL | NULL | cc<1>.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | ll<3> | vga_COPY_0_COPY_0 | 2155877376 | 4 | 1
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<2> | 3370 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<2>.Q | ll<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<0> | 3374 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<0>.Q | ll<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | ll<1> | 3376 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | ll<1>.Q | ll<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cc<4> | 3356 | ? | 0 | 0 | vga_COPY_0_COPY_0 | NULL | cc<4>.Q | cc<4> | 1 | 0 | MC_UIM