📄 i2c.vm6
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INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<6> | 15429 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<6>.Q | cnt_delay<6> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<7> | 15430 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<7>.Q | cnt_delay<7> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<9> | 15431 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<9>.Q | cnt_delay<9> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | main_state_FFd1 | 15454 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | main_state_FFd1.Q | main_state_FFd1 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | main_state_FFd2 | 15455 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | main_state_FFd2.Q | main_state_FFd2 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | wr_input_IBUF | 15398 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | wr_input_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rd_input_IBUF | 15397 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | rd_input_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_IBUF | 15399 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | clk_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rst_IBUF | 15400 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | rst_IBUF | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | start_delaycnt | 15410 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | start_delaycnt.Q | start_delaycnt | 1 | 0 | MC_UIM
SIGNAL_INSTANCE | start_delaycnt.SI | start_delaycnt | 0 | 27 | 4
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | start_delaycnt | 15410 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | start_delaycnt.Q | start_delaycnt | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<0> | 15412 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<0>.Q | cnt_delay<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<10> | 15413 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<10>.Q | cnt_delay<10> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<12> | 15414 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<12>.Q | cnt_delay<12> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<13> | 15415 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<13>.Q | cnt_delay<13> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<18> | 15416 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<18>.Q | cnt_delay<18> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<8> | 15417 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<8>.Q | cnt_delay<8> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<11> | 15418 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<11>.Q | cnt_delay<11> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<14> | 15419 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<14>.Q | cnt_delay<14> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<15> | 15420 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<15>.Q | cnt_delay<15> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<16> | 15421 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<16>.Q | cnt_delay<16> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<17> | 15422 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<17>.Q | cnt_delay<17> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<19> | 15423 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<19>.Q | cnt_delay<19> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<1> | 15424 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<1>.Q | cnt_delay<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<2> | 15425 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<2>.Q | cnt_delay<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<3> | 15426 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<3>.Q | cnt_delay<3> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<4> | 15427 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<4>.Q | cnt_delay<4> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<5> | 15428 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<5>.Q | cnt_delay<5> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<6> | 15429 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<6>.Q | cnt_delay<6> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<7> | 15430 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<7>.Q | cnt_delay<7> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<9> | 15431 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<9>.Q | cnt_delay<9> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | main_state_FFd1 | 15454 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | main_state_FFd1.Q | main_state_FFd1 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | main_state_FFd2 | 15455 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | main_state_FFd2.Q | main_state_FFd2 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | wr_input_IBUF | 15398 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | wr_input_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rd_input_IBUF | 15397 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | rd_input_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_IBUF | 15399 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | clk_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rst_IBUF | 15400 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | rst_IBUF | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | start_delaycnt.D1 | 15573 | ? | 0 | 4096 | start_delaycnt | NULL | NULL | start_delaycnt.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | start_delaycnt.D2 | 15574 | ? | 0 | 4096 | start_delaycnt | NULL | NULL | start_delaycnt.SI | 2 | 9 | MC_SI_D2
SPPTERM | 23 | IV_TRUE | start_delaycnt | IV_FALSE | cnt_delay<0> | IV_TRUE | cnt_delay<10> | IV_TRUE | cnt_delay<12> | IV_TRUE | cnt_delay<13> | IV_TRUE | cnt_delay<18> | IV_TRUE | cnt_delay<8> | IV_FALSE | cnt_delay<11> | IV_FALSE | cnt_delay<14> | IV_FALSE | cnt_delay<15> | IV_FALSE | cnt_delay<16> | IV_FALSE | cnt_delay<17> | IV_TRUE | cnt_delay<19> | IV_FALSE | cnt_delay<1> | IV_FALSE | cnt_delay<2> | IV_FALSE | cnt_delay<3> | IV_FALSE | cnt_delay<4> | IV_FALSE | cnt_delay<5> | IV_FALSE | cnt_delay<6> | IV_FALSE | cnt_delay<7> | IV_FALSE | cnt_delay<9> | IV_FALSE | main_state_FFd1 | IV_FALSE | main_state_FFd2
SPPTERM | 24 | IV_FALSE | rd_input_IBUF | IV_FALSE | start_delaycnt | IV_FALSE | cnt_delay<0> | IV_FALSE | cnt_delay<10> | IV_FALSE | cnt_delay<12> | IV_FALSE | cnt_delay<13> | IV_FALSE | cnt_delay<18> | IV_FALSE | cnt_delay<8> | IV_FALSE | cnt_delay<11> | IV_FALSE | cnt_delay<14> | IV_FALSE | cnt_delay<15> | IV_FALSE | cnt_delay<16> | IV_FALSE | cnt_delay<17> | IV_FALSE | cnt_delay<19> | IV_FALSE | cnt_delay<1> | IV_FALSE | cnt_delay<2> | IV_FALSE | cnt_delay<3> | IV_FALSE | cnt_delay<4> | IV_FALSE | cnt_delay<5> | IV_FALSE | cnt_delay<6> | IV_FALSE | cnt_delay<7> | IV_FALSE | cnt_delay<9> | IV_FALSE | main_state_FFd1 | IV_FALSE | main_state_FFd2
SPPTERM | 24 | IV_FALSE | wr_input_IBUF | IV_FALSE | start_delaycnt | IV_FALSE | cnt_delay<0> | IV_FALSE | cnt_delay<10> | IV_FALSE | cnt_delay<12> | IV_FALSE | cnt_delay<13> | IV_FALSE | cnt_delay<18> | IV_FALSE | cnt_delay<8> | IV_FALSE | cnt_delay<11> | IV_FALSE | cnt_delay<14> | IV_FALSE | cnt_delay<15> | IV_FALSE | cnt_delay<16> | IV_FALSE | cnt_delay<17> | IV_FALSE | cnt_delay<19> | IV_FALSE | cnt_delay<1> | IV_FALSE | cnt_delay<2> | IV_FALSE | cnt_delay<3> | IV_FALSE | cnt_delay<4> | IV_FALSE | cnt_delay<5> | IV_FALSE | cnt_delay<6> | IV_FALSE | cnt_delay<7> | IV_FALSE | cnt_delay<9> | IV_FALSE | main_state_FFd1 | IV_FALSE | main_state_FFd2
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | start_delaycnt.CLKF | 15575 | ? | 0 | 4096 | start_delaycnt | NULL | NULL | start_delaycnt.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | clk_IBUF
OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF
SIGNAL | NODE | start_delaycnt.RSTF | 15576 | ? | 0 | 4096 | start_delaycnt | NULL | NULL | start_delaycnt.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_FALSE | rst_IBUF
SRFF_INSTANCE | start_delaycnt.REG | start_delaycnt | 0 | 3 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | start_delaycnt.D | 15572 | ? | 0 | 0 | start_delaycnt | NULL | NULL | start_delaycnt.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | start_delaycnt.CLKF | 15575 | ? | 0 | 4096 | start_delaycnt | NULL | NULL | start_delaycnt.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | clk_IBUF
INPUT_NODE_TYPE | 3 | 8 | SRFF_R
SIGNAL | NODE | start_delaycnt.RSTF | 15576 | ? | 0 | 4096 | start_delaycnt | NULL | NULL | start_delaycnt.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_FALSE | rst_IBUF
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | start_delaycnt.Q | 15577 | ? | 0 | 0 | start_delaycnt | NULL | NULL | start_delaycnt.REG | 0 | 8 | SRFF_Q
MACROCELL_INSTANCE | PrldLow+OptxMapped | phase0 | i2c_COPY_0_COPY_0 | 2155873280 | 11 | 1
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | phase0 | 15411 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | phase0.Q | phase0 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<0> | 15462 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<0>.Q | clk_div<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<1> | 15463 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<1>.Q | clk_div<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<2> | 15464 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<2>.Q | clk_div<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<3> | 15465 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<3>.Q | clk_div<3> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<4> | 15466 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<4>.Q | clk_div<4> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<5> | 15467 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<5>.Q | clk_div<5> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<6> | 15468 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<6>.Q | clk_div<6> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<7> | 15469 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<7>.Q | clk_div<7> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_IBUF | 15399 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | clk_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rst_IBUF | 15400 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | rst_IBUF | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | phase0 | 15411 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | phase0.Q | phase0 | 1 | 0 | MC_UIM
SIGNAL_INSTANCE | phase0.SI | phase0 | 0 | 11 | 4
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | phase0 | 15411 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | phase0.Q | phase0 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<0> | 15462 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<0>.Q | clk_div<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<1> | 15463 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<1>.Q | clk_div<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<2> | 15464 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<2>.Q | clk_div<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<3> | 15465 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<3>.Q | clk_div<3> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<4> | 15466 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<4>.Q | clk_div<4> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<5> | 15467 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<5>.Q | clk_div<5> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<6> | 15468 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<6>.Q | clk_div<6> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<7> | 15469 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<7>.Q | clk_div<7> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_IBUF | 15399 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | clk_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rst_IBUF | 15400 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | rst_IBUF | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | phase0.D1 | 15579 | ? | 0 | 4096 | phase0 | NULL | NULL | phase0.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | phase0.D2 | 15580 | ? | 0 | 4096 | phase0 | NULL | NULL | phase0.SI | 2 | 9 | MC_SI_D2
SPPTERM | 9 | IV_FALSE | phase0 | IV_TRUE | clk_div<0> | IV_TRUE | clk_div<1> | IV_FALSE | clk_div<2> | IV_FALSE | clk_div<3> | IV_FALSE | clk_div<4> | IV_TRUE | clk_div<5> | IV_TRUE | clk_div<6> | IV_FALSE | clk_div<7>
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | phase0.CLKF | 15581 | ? | 0 | 4096 | phase0 | NULL | NULL | phase0.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | clk_IBUF
OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF
SIGNAL | NODE | phase0.RSTF | 15582 | ? | 0 | 4096 | phase0 | NULL | NULL | phase0.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_FALSE | rst_IBUF
SRFF_INSTANCE | phase0.REG | phase0 | 0 | 3 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | phase0.D | 15578 | ? | 0 | 0 | phase0 | NULL | NULL | phase0.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | phase0.CLKF | 15581 | ? | 0 | 4096 | phase0 | NULL | NULL | phase0.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | clk_IBUF
INPUT_NODE_TYPE | 3 | 8 | SRFF_R
SIGNAL | NODE | phase0.RSTF | 15582 | ? | 0 | 4096 | phase0 | NULL | NULL | phase0.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_FALSE | rst_IBUF
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | phase0.Q | 15583 | ? | 0 | 0 | phase0 | NULL | NULL | phase0.REG | 0 | 8 | SRFF_Q
MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | cnt_delay<0> | i2c_COPY_0_COPY_0 | 2155877632 | 23 | 1
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
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