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📄 mcu.vm6

📁 Mars-XC2S50-S-Core-V2.0开发板核心板的说明和设计文档
💻 VM6
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INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | LA<1> | 811 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | LA<1>.Q | LA<1> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | REG2<3> | 776 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | REG2<3>.Q | REG2<3> | 0 | 0 | MC_Q

SIGNAL_INSTANCE | REG2<3>.SI | REG2<3> | 0 | 5 | 5
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N3 | 775 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | N3 | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | mcu_nwr_IBUF | 769 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | mcu_nwr_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rst_IBUF | 768 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | rst_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | LA<0> | 810 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | LA<0>.Q | LA<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | LA<1> | 811 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | LA<1>.Q | LA<1> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | REG2<3>.D1 | 863 | ? | 0 | 4096 | REG2<3> | NULL | NULL | REG2<3>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | REG2<3>.D2 | 864 | ? | 0 | 4096 | REG2<3> | NULL | NULL | REG2<3>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_TRUE | N3
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | REG2<3>.CLKF | 865 | ? | 0 | 4096 | REG2<3> | NULL | NULL | REG2<3>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_FALSE | mcu_nwr_IBUF
OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF
SIGNAL | NODE | REG2<3>.RSTF | 866 | ? | 0 | 4096 | REG2<3> | NULL | NULL | REG2<3>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_FALSE | rst_IBUF
OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
SIGNAL | NODE | REG2<3>.CE | 867 | ? | 0 | 4096 | REG2<3> | NULL | NULL | REG2<3>.SI | 10 | 9 | MC_SI_CE
SPPTERM | 2 | IV_FALSE | LA<0> | IV_TRUE | LA<1>

SRFF_INSTANCE | REG2<3>.REG | REG2<3> | 0 | 4 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | REG2<3>.D | 862 | ? | 0 | 0 | REG2<3> | NULL | NULL | REG2<3>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | REG2<3>.CLKF | 865 | ? | 0 | 4096 | REG2<3> | NULL | NULL | REG2<3>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_FALSE | mcu_nwr_IBUF
INPUT_NODE_TYPE | 3 | 8 | SRFF_R
SIGNAL | NODE | REG2<3>.RSTF | 866 | ? | 0 | 4096 | REG2<3> | NULL | NULL | REG2<3>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_FALSE | rst_IBUF
INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
SIGNAL | NODE | REG2<3>.CE | 867 | ? | 0 | 4096 | REG2<3> | NULL | NULL | REG2<3>.SI | 10 | 9 | MC_SI_CE
SPPTERM | 2 | IV_FALSE | LA<0> | IV_TRUE | LA<1>
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | REG2<3>.Q | 868 | ? | 0 | 0 | REG2<3> | NULL | NULL | REG2<3>.REG | 0 | 8 | SRFF_Q

INPUT_INSTANCE | 0 | 0 | NULL | N4 | mcu_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | data<4> | 825 | PIPO | 0 | 64 | mcu_COPY_0_COPY_0 | NULL | NULL | data<4> | 0 | 6 | OI_OUT
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N4 | 777 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | N4 | 0 | 5 | II_IMUX

MACROCELL_INSTANCE | PrldLow+OptxMapped | REG2<4> | mcu_COPY_0_COPY_0 | 2155873280 | 5 | 1
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N4 | 777 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | N4 | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | mcu_nwr_IBUF | 769 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | mcu_nwr_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rst_IBUF | 768 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | rst_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | LA<0> | 810 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | LA<0>.Q | LA<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | LA<1> | 811 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | LA<1>.Q | LA<1> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | REG2<4> | 778 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | REG2<4>.Q | REG2<4> | 0 | 0 | MC_Q

SIGNAL_INSTANCE | REG2<4>.SI | REG2<4> | 0 | 5 | 5
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N4 | 777 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | N4 | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | mcu_nwr_IBUF | 769 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | mcu_nwr_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rst_IBUF | 768 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | rst_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | LA<0> | 810 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | LA<0>.Q | LA<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | LA<1> | 811 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | LA<1>.Q | LA<1> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | REG2<4>.D1 | 870 | ? | 0 | 4096 | REG2<4> | NULL | NULL | REG2<4>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | REG2<4>.D2 | 871 | ? | 0 | 4096 | REG2<4> | NULL | NULL | REG2<4>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_TRUE | N4
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | REG2<4>.CLKF | 872 | ? | 0 | 4096 | REG2<4> | NULL | NULL | REG2<4>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_FALSE | mcu_nwr_IBUF
OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF
SIGNAL | NODE | REG2<4>.RSTF | 873 | ? | 0 | 4096 | REG2<4> | NULL | NULL | REG2<4>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_FALSE | rst_IBUF
OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
SIGNAL | NODE | REG2<4>.CE | 874 | ? | 0 | 4096 | REG2<4> | NULL | NULL | REG2<4>.SI | 10 | 9 | MC_SI_CE
SPPTERM | 2 | IV_FALSE | LA<0> | IV_TRUE | LA<1>

SRFF_INSTANCE | REG2<4>.REG | REG2<4> | 0 | 4 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | REG2<4>.D | 869 | ? | 0 | 0 | REG2<4> | NULL | NULL | REG2<4>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | REG2<4>.CLKF | 872 | ? | 0 | 4096 | REG2<4> | NULL | NULL | REG2<4>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_FALSE | mcu_nwr_IBUF
INPUT_NODE_TYPE | 3 | 8 | SRFF_R
SIGNAL | NODE | REG2<4>.RSTF | 873 | ? | 0 | 4096 | REG2<4> | NULL | NULL | REG2<4>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_FALSE | rst_IBUF
INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
SIGNAL | NODE | REG2<4>.CE | 874 | ? | 0 | 4096 | REG2<4> | NULL | NULL | REG2<4>.SI | 10 | 9 | MC_SI_CE
SPPTERM | 2 | IV_FALSE | LA<0> | IV_TRUE | LA<1>
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | REG2<4>.Q | 875 | ? | 0 | 0 | REG2<4> | NULL | NULL | REG2<4>.REG | 0 | 8 | SRFF_Q

INPUT_INSTANCE | 0 | 0 | NULL | N5 | mcu_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | data<5> | 826 | PIPO | 0 | 64 | mcu_COPY_0_COPY_0 | NULL | NULL | data<5> | 0 | 6 | OI_OUT
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N5 | 779 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | N5 | 0 | 5 | II_IMUX

MACROCELL_INSTANCE | PrldLow+OptxMapped | REG2<5> | mcu_COPY_0_COPY_0 | 2155873280 | 5 | 1
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N5 | 779 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | N5 | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | mcu_nwr_IBUF | 769 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | mcu_nwr_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rst_IBUF | 768 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | rst_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | LA<0> | 810 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | LA<0>.Q | LA<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | LA<1> | 811 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | LA<1>.Q | LA<1> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | REG2<5> | 780 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | REG2<5>.Q | REG2<5> | 0 | 0 | MC_Q

SIGNAL_INSTANCE | REG2<5>.SI | REG2<5> | 0 | 5 | 5
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N5 | 779 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | N5 | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | mcu_nwr_IBUF | 769 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | mcu_nwr_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rst_IBUF | 768 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | rst_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | LA<0> | 810 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | LA<0>.Q | LA<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | LA<1> | 811 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | LA<1>.Q | LA<1> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | REG2<5>.D1 | 877 | ? | 0 | 4096 | REG2<5> | NULL | NULL | REG2<5>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | REG2<5>.D2 | 878 | ? | 0 | 4096 | REG2<5> | NULL | NULL | REG2<5>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_TRUE | N5
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | REG2<5>.CLKF | 879 | ? | 0 | 4096 | REG2<5> | NULL | NULL | REG2<5>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_FALSE | mcu_nwr_IBUF
OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF
SIGNAL | NODE | REG2<5>.RSTF | 880 | ? | 0 | 4096 | REG2<5> | NULL | NULL | REG2<5>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_FALSE | rst_IBUF
OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
SIGNAL | NODE | REG2<5>.CE | 881 | ? | 0 | 4096 | REG2<5> | NULL | NULL | REG2<5>.SI | 10 | 9 | MC_SI_CE
SPPTERM | 2 | IV_FALSE | LA<0> | IV_TRUE | LA<1>

SRFF_INSTANCE | REG2<5>.REG | REG2<5> | 0 | 4 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | REG2<5>.D | 876 | ? | 0 | 0 | REG2<5> | NULL | NULL | REG2<5>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | REG2<5>.CLKF | 879 | ? | 0 | 4096 | REG2<5> | NULL | NULL | REG2<5>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_FALSE | mcu_nwr_IBUF
INPUT_NODE_TYPE | 3 | 8 | SRFF_R
SIGNAL | NODE | REG2<5>.RSTF | 880 | ? | 0 | 4096 | REG2<5> | NULL | NULL | REG2<5>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_FALSE | rst_IBUF
INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
SIGNAL | NODE | REG2<5>.CE | 881 | ? | 0 | 4096 | REG2<5> | NULL | NULL | REG2<5>.SI | 10 | 9 | MC_SI_CE
SPPTERM | 2 | IV_FALSE | LA<0> | IV_TRUE | LA<1>
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | REG2<5>.Q | 882 | ? | 0 | 0 | REG2<5> | NULL | NULL | REG2<5>.REG | 0 | 8 | SRFF_Q

INPUT_INSTANCE | 0 | 0 | NULL | N6 | mcu_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | data<6> | 827 | PIPO | 0 | 64 | mcu_COPY_0_COPY_0 | NULL | NULL | data<6> | 0 | 6 | OI_OUT
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N6 | 781 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | N6 | 0 | 5 | II_IMUX

MACROCELL_INSTANCE | PrldLow+OptxMapped | REG2<6> | mcu_COPY_0_COPY_0 | 2155873280 | 5 | 1
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N6 | 781 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | N6 | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | mcu_nwr_IBUF | 769 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | mcu_nwr_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rst_IBUF | 768 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | rst_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | LA<0> | 810 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | LA<0>.Q | LA<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | LA<1> | 811 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | LA<1>.Q | LA<1> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | REG2<6> | 782 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | REG2<6>.Q | REG2<6> | 0 | 0 | MC_Q

SIGNAL_INSTANCE | REG2<6>.SI | REG2<6> | 0 | 5 | 5
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N6 | 781 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | N6 | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | mcu_nwr_IBUF | 769 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | mcu_nwr_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rst_IBUF | 768 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | NULL | rst_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | LA<0> | 810 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | LA<0>.Q | LA<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | LA<1> | 811 | ? | 0 | 0 | mcu_COPY_0_COPY_0 | NULL | LA<1>.Q | LA<1> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | REG2<6>.D1 | 884 | ? | 0 | 4096 | REG2<6> | NULL | NULL | REG2<6>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | REG2<6>.D2 | 885 | ? | 0 | 4096 | REG2<6> | NULL | NULL | REG2<6>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_TRUE | N6
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | REG2<6>.CLKF | 886 | ? | 0 | 4096 | REG2<6> | NULL | NULL | REG2<6>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_FALSE | mcu_nwr_IBUF
OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF
SIGNAL | NODE | REG2<6>.RSTF | 887 | ? | 0 | 4096 | REG2<6> | NULL | NULL | REG2<6>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_FALSE | rst_IBUF
OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
SIGNAL | NODE | REG2<6>.CE | 888 | ? | 0 | 4096 | REG2<6> | NULL | NULL | REG2<6>.SI | 10 | 9 | MC_SI_CE
SPPTERM | 2 | IV_FALSE | LA<0> | IV_TRUE | LA<1>

SRFF_INSTANCE | REG2<6>.REG | REG2<6> | 0 | 4 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | REG2<6>.D | 883 | ? | 0 | 0 | REG2<6> | NULL | NULL | REG2<6>.XOR | 0 | 7 | ALU_F

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