dial1.rpt

Mars-XC2S50-S-Core-V2.0开发板核心板的说明和设计文档

 
cpldfit:  version H.42                              Xilinx Inc.
                                  Fitter Report
Design Name: dial1                               Date:  2-21-2006, 11:33AM
Device Used: XC95144XL-10-TQ144
Fitting Status: Successful

*************************  Mapped Resource Summary  **************************

Macrocells     Product Terms    Function Block   Registers      Pins           
Used/Tot       Used/Tot         Inps Used/Tot    Used/Tot       Used/Tot       
35 /144 ( 24%) 129 /720  ( 18%) 68 /432 ( 16%)   18 /144 ( 12%) 26 /117 ( 22%)

** Function Block Resources **

Function    Mcells      FB Inps     Pterms      IO          
Block       Used/Tot    Used/Tot    Used/Tot    Used/Tot    
FB1          10/18       17/54       30/90       0/15
FB2           0/18        0/54        0/90       0/15
FB3           0/18        0/54        0/90       0/15
FB4           8/18       17/54       19/90       6/15
FB5           0/18        0/54        0/90       0/14
FB6          15/18       17/54       65/90       9/13
FB7           0/18        0/54        0/90       0/15
FB8           2/18       17/54       15/90       1/15
             -----       -----       -----      -----    
             35/144      68/432     129/720     16/117

* - Resource is exhausted

** Global Control Resources **

Global clock net(s) unused.
Global output enable net(s) unused.
Global set/reset net(s) unused.

** Pin Resources **

Signal Type    Required     Mapped  |  Pin Type            Used    Total 
------------------------------------|------------------------------------
Input         :   10          10    |  I/O              :    26     109
Output        :   16          16    |  GCK/IO           :     0       3
Bidirectional :    0           0    |  GTS/IO           :     0       4
GCK           :    0           0    |  GSR/IO           :     0       1
GTS           :    0           0    |
GSR           :    0           0    |
                 ----        ----
        Total     26          26

** Power Data **

There are 35 macrocells in high performance mode (MCHP).
There are 0 macrocells in low power mode (MCLP).
End of Mapped Resource Summary
**************************  Errors and Warnings  ***************************

WARNING:Cpld:896 - Unable to map all desired signals into function block, FB6,
   because too many function block product terms are required. Buffering output
   signal dataout<7> to allow all signals assigned to this function block to be
   placed.
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB6,
   because too many function block product terms are required. Buffering output
   signal dataout<4> to allow all signals assigned to this function block to be
   placed.
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB6,
   because too many function block product terms are required. Buffering output
   signal dataout<2> to allow all signals assigned to this function block to be
   placed.
*************************  Summary of Mapped Logic  ************************

** 16 Outputs **

Signal              Total Total Loc     Pin  Pin     Pin     Pwr  Slew Reg Init
Name                Pts   Inps          No.  Type    Use     Mode Rate State
dataout<1>          9     10    FB4_1   118  I/O     O       STD  FAST 
en<2>               0     0     FB4_2   126  I/O     O       STD  FAST 
en<6>               0     0     FB4_3   133  I/O     O       STD  FAST 
en<0>               2     2     FB4_9   131  I/O     O       STD  FAST RESET
en<1>               2     2     FB4_11  132  I/O     O       STD  FAST RESET
en<7>               0     0     FB4_12  134  I/O     O       STD  FAST 
dataout<7>          1     1     FB6_2   106  I/O     O       STD  FAST 
dataout<5>          9     10    FB6_4   111  I/O     O       STD  FAST 
dataout<4>          1     1     FB6_8   113  I/O     O       STD  FAST 
dataout<2>          1     1     FB6_9   116  I/O     O       STD  FAST 
dataout<3>          9     10    FB6_10  115  I/O     O       STD  FAST 
dataout<0>          0     0     FB6_11  119  I/O     O       STD  FAST 
en<3>               0     0     FB6_12  120  I/O     O       STD  FAST 
en<4>               0     0     FB6_15  124  I/O     O       STD  FAST 
en<5>               0     0     FB6_17  125  I/O     O       STD  FAST 
dataout<6>          12    10    FB8_16  107  I/O     O       STD  FAST 

** 19 Buried Nodes **

Signal              Total Total Loc     Pwr  Reg Init
Name                Pts   Inps          Mode State
cnt_scan<9>         3     11    FB1_9   STD  RESET
cnt_scan<8>         3     10    FB1_10  STD  RESET
cnt_scan<7>         3     9     FB1_11  STD  RESET
cnt_scan<6>         3     8     FB1_12  STD  RESET
cnt_scan<15>        3     17    FB1_13  STD  RESET
cnt_scan<14>        3     16    FB1_14  STD  RESET
cnt_scan<13>        3     15    FB1_15  STD  RESET
cnt_scan<12>        3     14    FB1_16  STD  RESET
cnt_scan<11>        3     13    FB1_17  STD  RESET
cnt_scan<10>        3     12    FB1_18  STD  RESET
cnt_scan<4>         3     6     FB4_17  STD  RESET
cnt_scan<3>         3     5     FB4_18  STD  RESET
dataout<2>_BUFR     12    10    FB6_1   STD  
cnt_scan<0>         2     2     FB6_5   STD  RESET
cnt_scan<2>         3     4     FB6_6   STD  RESET
cnt_scan<1>         3     3     FB6_7   STD  RESET
dataout<7>_BUFR     12    10    FB6_13  STD  
dataout<4>_BUFR     12    10    FB6_16  STD  
cnt_scan<5>         3     7     FB8_18  STD  RESET

** 10 Inputs **

Signal              Loc     Pin  Pin     Pin     
Name                        No.  Type    Use     
clk                 FB4_5   128  I/O     I
datain<4>           FB5_3   59   I/O     I
datain<1>           FB5_7   66   I/O     I
datain<7>           FB5_8   56   I/O     I
datain<6>           FB5_9   57   I/O     I
datain<5>           FB5_11  58   I/O     I
datain<3>           FB5_14  61   I/O     I
datain<2>           FB5_15  64   I/O     I
datain<0>           FB5_17  69   I/O     I
rst                 FB7_2   71   I/O     I

Legend:
Pin No. - ~ - User Assigned
**************************  Function Block Details  ************************
Legend:
Total Pt     - Total product terms used by the macrocell signal
Imp Pt       - Product terms imported from other macrocells
Exp Pt       - Product terms exported to other macrocells
               in direction shown
Unused Pt    - Unused local product terms remaining in macrocell
Loc          - Location where logic was mapped in device
Pin Type/Use - I  - Input             GCK - Global Clock
               O  - Output            GTS - Global Output Enable
              (b) - Buried macrocell  GSR - Global Set/Reset
X            - Signal used as input to the macrocell logic.
Pin No.      - ~  - User Assigned
*********************************** FB1  ***********************************
Number of function block inputs used/remaining:               17/37
Number of signals used by logic mapping into function block:  17
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0     0   5     FB1_1   23    I/O     
(unused)              0       0     0   5     FB1_2   16    I/O     
(unused)              0       0     0   5     FB1_3   17    I/O     
(unused)              0       0     0   5     FB1_4   25    I/O     
(unused)              0       0     0   5     FB1_5   19    I/O     
(unused)              0       0     0   5     FB1_6   20    I/O     
(unused)              0       0     0   5     FB1_7         (b)     
(unused)              0       0     0   5     FB1_8   21    I/O     
cnt_scan<9>           3       0     0   2     FB1_9   22    I/O     (b)
cnt_scan<8>           3       0     0   2     FB1_10  31    I/O     (b)
cnt_scan<7>           3       0     0   2     FB1_11  24    I/O     (b)
cnt_scan<6>           3       0     0   2     FB1_12  26    I/O     (b)
cnt_scan<15>          3       0     0   2     FB1_13        (b)     (b)
cnt_scan<14>          3       0     0   2     FB1_14  27    I/O     (b)
cnt_scan<13>          3       0     0   2     FB1_15  28    I/O     (b)
cnt_scan<12>          3       0     0   2     FB1_16  35    I/O     (b)
cnt_scan<11>          3       0     0   2     FB1_17  30    GCK/I/O (b)
cnt_scan<10>          3       0     0   2     FB1_18        (b)     (b)

Signals Used by Logic in Function Block
  1: clk                7: cnt_scan<14>      13: cnt_scan<6> 
  2: cnt_scan<0>        8: cnt_scan<1>       14: cnt_scan<7> 
  3: cnt_scan<10>       9: cnt_scan<2>       15: cnt_scan<8> 
  4: cnt_scan<11>      10: cnt_scan<3>       16: cnt_scan<9> 
  5: cnt_scan<12>      11: cnt_scan<4>       17: rst 
  6: cnt_scan<13>      12: cnt_scan<5>      

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
cnt_scan<9>          XX.....XXXXXXXX.X....................... 11
cnt_scan<8>          XX.....XXXXXXX..X....................... 10
cnt_scan<7>          XX.....XXXXXX...X....................... 9
cnt_scan<6>          XX.....XXXXX....X....................... 8
cnt_scan<15>         XXXXXXXXXXXXXXXXX....................... 17
cnt_scan<14>         XXXXXX.XXXXXXXXXX....................... 16
cnt_scan<13>         XXXXX..XXXXXXXXXX....................... 15
cnt_scan<12>         XXXX...XXXXXXXXXX....................... 14
cnt_scan<11>         XXX....XXXXXXXXXX....................... 13
cnt_scan<10>         XX.....XXXXXXXXXX....................... 12
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB2  ***********************************
Number of function block inputs used/remaining:               0/54
Number of signals used by logic mapping into function block:  0
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0     0   5     FB2_1   142   I/O     
(unused)              0       0     0   5     FB2_2   143   GSR/I/O 
(unused)              0       0     0   5     FB2_3         (b)     
(unused)              0       0     0   5     FB2_4   4     I/O     
(unused)              0       0     0   5     FB2_5   2     GTS/I/O 
(unused)              0       0     0   5     FB2_6   3     GTS/I/O 
(unused)              0       0     0   5     FB2_7         (b)     
(unused)              0       0     0   5     FB2_8   5     GTS/I/O 
(unused)              0       0     0   5     FB2_9   6     GTS/I/O 
(unused)              0       0     0   5     FB2_10  7     I/O     
(unused)              0       0     0   5     FB2_11  9     I/O     
(unused)              0       0     0   5     FB2_12  10    I/O     
(unused)              0       0     0   5     FB2_13  12    I/O     
(unused)              0       0     0   5     FB2_14  11    I/O     
(unused)              0       0     0   5     FB2_15  13    I/O     
(unused)              0       0     0   5     FB2_16  14    I/O     
(unused)              0       0     0   5     FB2_17  15    I/O     
(unused)              0       0     0   5     FB2_18        (b)     
*********************************** FB3  ***********************************
Number of function block inputs used/remaining:               0/54
Number of signals used by logic mapping into function block:  0
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0     0   5     FB3_1   39    I/O     
(unused)              0       0     0   5     FB3_2   32    GCK/I/O 
(unused)              0       0     0   5     FB3_3   41    I/O     
(unused)              0       0     0   5     FB3_4   44    I/O     
(unused)              0       0     0   5     FB3_5   33    I/O     
(unused)              0       0     0   5     FB3_6   34    I/O     
(unused)              0       0     0   5     FB3_7   46    I/O     
(unused)              0       0     0   5     FB3_8   38    GCK/I/O 
(unused)              0       0     0   5     FB3_9   40    I/O     
(unused)              0       0     0   5     FB3_10  48    I/O     
(unused)              0       0     0   5     FB3_11  43    I/O     
(unused)              0       0     0   5     FB3_12  45    I/O     
(unused)              0       0     0   5     FB3_13        (b)     
(unused)              0       0     0   5     FB3_14  49    I/O     
(unused)              0       0     0   5     FB3_15  50    I/O     
(unused)              0       0     0   5     FB3_16        (b)     
(unused)              0       0     0   5     FB3_17  51    I/O     
(unused)              0       0     0   5     FB3_18        (b)     
*********************************** FB4  ***********************************
Number of function block inputs used/remaining:               17/37
Number of signals used by logic mapping into function block:  17
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
dataout<1>            9       4<-   0   0     FB4_1   118   I/O     O