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📄 lcd1.mfd

📁 Mars-XC2S50-S-Core-V2.0开发板核心板的说明和设计文档
💻 MFD
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	div_cnt<3> & div_cnt<4> & div_cnt<5> & div_cnt<6> & 
	div_cnt<7> & div_cnt<8> & div_cnt<9>;
   div_cnt<10>.CLK = !clk;
   div_cnt<10>.AR = !nRST;

MACROCELL | 0 | 16 | div_cnt<11>
ATTRIBUTES | 4326192 | 0
OUTPUTMC | 3 | 0 | 13 | 0 | 15 | 0 | 14
INPUTS | 13 | div_cnt<0>  | div_cnt<10>  | div_cnt<1>  | div_cnt<2>  | div_cnt<3>  | div_cnt<4>  | div_cnt<5>  | div_cnt<6>  | div_cnt<7>  | div_cnt<8>  | div_cnt<9>  | clk  | nRST
INPUTMC | 11 | 3 | 12 | 0 | 17 | 0 | 12 | 0 | 11 | 0 | 10 | 0 | 9 | 0 | 8 | 0 | 7 | 0 | 6 | 0 | 5 | 0 | 4
INPUTP | 2 | 143 | 79
EQ | 5 | 
   div_cnt<11>.T = div_cnt<0> & div_cnt<10> & div_cnt<1> & 
	div_cnt<2> & div_cnt<3> & div_cnt<4> & div_cnt<5> & 
	div_cnt<6> & div_cnt<7> & div_cnt<8> & div_cnt<9>;
   div_cnt<11>.CLK = !clk;
   div_cnt<11>.AR = !nRST;

MACROCELL | 0 | 15 | div_cnt<12>
ATTRIBUTES | 4326192 | 0
OUTPUTMC | 2 | 0 | 13 | 0 | 14
INPUTS | 14 | div_cnt<0>  | div_cnt<10>  | div_cnt<11>  | div_cnt<1>  | div_cnt<2>  | div_cnt<3>  | div_cnt<4>  | div_cnt<5>  | div_cnt<6>  | div_cnt<7>  | div_cnt<8>  | div_cnt<9>  | clk  | nRST
INPUTMC | 12 | 3 | 12 | 0 | 17 | 0 | 16 | 0 | 12 | 0 | 11 | 0 | 10 | 0 | 9 | 0 | 8 | 0 | 7 | 0 | 6 | 0 | 5 | 0 | 4
INPUTP | 2 | 143 | 79
EQ | 6 | 
   div_cnt<12>.T = div_cnt<0> & div_cnt<10> & div_cnt<11> & 
	div_cnt<1> & div_cnt<2> & div_cnt<3> & div_cnt<4> & 
	div_cnt<5> & div_cnt<6> & div_cnt<7> & div_cnt<8> & 
	div_cnt<9>;
   div_cnt<12>.CLK = !clk;
   div_cnt<12>.AR = !nRST;

MACROCELL | 0 | 14 | div_cnt<13>
ATTRIBUTES | 4326192 | 0
OUTPUTMC | 1 | 0 | 13
INPUTS | 15 | div_cnt<0>  | div_cnt<10>  | div_cnt<11>  | div_cnt<12>  | div_cnt<1>  | div_cnt<2>  | div_cnt<3>  | div_cnt<4>  | div_cnt<5>  | div_cnt<6>  | div_cnt<7>  | div_cnt<8>  | div_cnt<9>  | clk  | nRST
INPUTMC | 13 | 3 | 12 | 0 | 17 | 0 | 16 | 0 | 15 | 0 | 12 | 0 | 11 | 0 | 10 | 0 | 9 | 0 | 8 | 0 | 7 | 0 | 6 | 0 | 5 | 0 | 4
INPUTP | 2 | 143 | 79
EQ | 6 | 
   div_cnt<13>.T = div_cnt<0> & div_cnt<10> & div_cnt<11> & 
	div_cnt<12> & div_cnt<1> & div_cnt<2> & div_cnt<3> & 
	div_cnt<4> & div_cnt<5> & div_cnt<6> & div_cnt<7> & 
	div_cnt<8> & div_cnt<9>;
   div_cnt<13>.CLK = !clk;
   div_cnt<13>.AR = !nRST;

MACROCELL | 0 | 12 | div_cnt<1>
ATTRIBUTES | 4326192 | 0
OUTPUTMC | 13 | 0 | 13 | 0 | 17 | 0 | 16 | 0 | 15 | 0 | 14 | 0 | 11 | 0 | 10 | 0 | 9 | 0 | 8 | 0 | 7 | 0 | 6 | 0 | 5 | 0 | 4
INPUTS | 3 | div_cnt<0>  | clk  | nRST
INPUTMC | 1 | 3 | 12
INPUTP | 2 | 143 | 79
EQ | 3 | 
   div_cnt<1>.T = div_cnt<0>;
   div_cnt<1>.CLK = !clk;
   div_cnt<1>.AR = !nRST;

MACROCELL | 0 | 11 | div_cnt<2>
ATTRIBUTES | 4326192 | 0
OUTPUTMC | 12 | 0 | 13 | 0 | 17 | 0 | 16 | 0 | 15 | 0 | 14 | 0 | 10 | 0 | 9 | 0 | 8 | 0 | 7 | 0 | 6 | 0 | 5 | 0 | 4
INPUTS | 4 | div_cnt<0>  | div_cnt<1>  | clk  | nRST
INPUTMC | 2 | 3 | 12 | 0 | 12
INPUTP | 2 | 143 | 79
EQ | 3 | 
   div_cnt<2>.T = div_cnt<0> & div_cnt<1>;
   div_cnt<2>.CLK = !clk;
   div_cnt<2>.AR = !nRST;

MACROCELL | 0 | 10 | div_cnt<3>
ATTRIBUTES | 4326192 | 0
OUTPUTMC | 11 | 0 | 13 | 0 | 17 | 0 | 16 | 0 | 15 | 0 | 14 | 0 | 9 | 0 | 8 | 0 | 7 | 0 | 6 | 0 | 5 | 0 | 4
INPUTS | 5 | div_cnt<0>  | div_cnt<1>  | div_cnt<2>  | clk  | nRST
INPUTMC | 3 | 3 | 12 | 0 | 12 | 0 | 11
INPUTP | 2 | 143 | 79
EQ | 3 | 
   div_cnt<3>.T = div_cnt<0> & div_cnt<1> & div_cnt<2>;
   div_cnt<3>.CLK = !clk;
   div_cnt<3>.AR = !nRST;

MACROCELL | 0 | 9 | div_cnt<4>
ATTRIBUTES | 4326192 | 0
OUTPUTMC | 10 | 0 | 13 | 0 | 17 | 0 | 16 | 0 | 15 | 0 | 14 | 0 | 8 | 0 | 7 | 0 | 6 | 0 | 5 | 0 | 4
INPUTS | 6 | div_cnt<0>  | div_cnt<1>  | div_cnt<2>  | div_cnt<3>  | clk  | nRST
INPUTMC | 4 | 3 | 12 | 0 | 12 | 0 | 11 | 0 | 10
INPUTP | 2 | 143 | 79
EQ | 4 | 
   div_cnt<4>.T = div_cnt<0> & div_cnt<1> & div_cnt<2> & 
	div_cnt<3>;
   div_cnt<4>.CLK = !clk;
   div_cnt<4>.AR = !nRST;

MACROCELL | 0 | 8 | div_cnt<5>
ATTRIBUTES | 4326192 | 0
OUTPUTMC | 9 | 0 | 13 | 0 | 17 | 0 | 16 | 0 | 15 | 0 | 14 | 0 | 7 | 0 | 6 | 0 | 5 | 0 | 4
INPUTS | 7 | div_cnt<0>  | div_cnt<1>  | div_cnt<2>  | div_cnt<3>  | div_cnt<4>  | clk  | nRST
INPUTMC | 5 | 3 | 12 | 0 | 12 | 0 | 11 | 0 | 10 | 0 | 9
INPUTP | 2 | 143 | 79
EQ | 4 | 
   div_cnt<5>.T = div_cnt<0> & div_cnt<1> & div_cnt<2> & 
	div_cnt<3> & div_cnt<4>;
   div_cnt<5>.CLK = !clk;
   div_cnt<5>.AR = !nRST;

MACROCELL | 0 | 7 | div_cnt<6>
ATTRIBUTES | 4326192 | 0
OUTPUTMC | 8 | 0 | 13 | 0 | 17 | 0 | 16 | 0 | 15 | 0 | 14 | 0 | 6 | 0 | 5 | 0 | 4
INPUTS | 8 | div_cnt<0>  | div_cnt<1>  | div_cnt<2>  | div_cnt<3>  | div_cnt<4>  | div_cnt<5>  | clk  | nRST
INPUTMC | 6 | 3 | 12 | 0 | 12 | 0 | 11 | 0 | 10 | 0 | 9 | 0 | 8
INPUTP | 2 | 143 | 79
EQ | 4 | 
   div_cnt<6>.T = div_cnt<0> & div_cnt<1> & div_cnt<2> & 
	div_cnt<3> & div_cnt<4> & div_cnt<5>;
   div_cnt<6>.CLK = !clk;
   div_cnt<6>.AR = !nRST;

MACROCELL | 0 | 6 | div_cnt<7>
ATTRIBUTES | 4326192 | 0
OUTPUTMC | 7 | 0 | 13 | 0 | 17 | 0 | 16 | 0 | 15 | 0 | 14 | 0 | 5 | 0 | 4
INPUTS | 9 | div_cnt<0>  | div_cnt<1>  | div_cnt<2>  | div_cnt<3>  | div_cnt<4>  | div_cnt<5>  | div_cnt<6>  | clk  | nRST
INPUTMC | 7 | 3 | 12 | 0 | 12 | 0 | 11 | 0 | 10 | 0 | 9 | 0 | 8 | 0 | 7
INPUTP | 2 | 143 | 79
EQ | 4 | 
   div_cnt<7>.T = div_cnt<0> & div_cnt<1> & div_cnt<2> & 
	div_cnt<3> & div_cnt<4> & div_cnt<5> & div_cnt<6>;
   div_cnt<7>.CLK = !clk;
   div_cnt<7>.AR = !nRST;

MACROCELL | 0 | 5 | div_cnt<8>
ATTRIBUTES | 4326192 | 0
OUTPUTMC | 6 | 0 | 13 | 0 | 17 | 0 | 16 | 0 | 15 | 0 | 14 | 0 | 4
INPUTS | 10 | div_cnt<0>  | div_cnt<1>  | div_cnt<2>  | div_cnt<3>  | div_cnt<4>  | div_cnt<5>  | div_cnt<6>  | div_cnt<7>  | clk  | nRST
INPUTMC | 8 | 3 | 12 | 0 | 12 | 0 | 11 | 0 | 10 | 0 | 9 | 0 | 8 | 0 | 7 | 0 | 6
INPUTP | 2 | 143 | 79
EQ | 5 | 
   div_cnt<8>.T = div_cnt<0> & div_cnt<1> & div_cnt<2> & 
	div_cnt<3> & div_cnt<4> & div_cnt<5> & div_cnt<6> & 
	div_cnt<7>;
   div_cnt<8>.CLK = !clk;
   div_cnt<8>.AR = !nRST;

MACROCELL | 0 | 4 | div_cnt<9>
ATTRIBUTES | 4326192 | 0
OUTPUTMC | 5 | 0 | 13 | 0 | 17 | 0 | 16 | 0 | 15 | 0 | 14
INPUTS | 11 | div_cnt<0>  | div_cnt<1>  | div_cnt<2>  | div_cnt<3>  | div_cnt<4>  | div_cnt<5>  | div_cnt<6>  | div_cnt<7>  | div_cnt<8>  | clk  | nRST
INPUTMC | 9 | 3 | 12 | 0 | 12 | 0 | 11 | 0 | 10 | 0 | 9 | 0 | 8 | 0 | 7 | 0 | 6 | 0 | 5
INPUTP | 2 | 143 | 79
EQ | 5 | 
   div_cnt<9>.T = div_cnt<0> & div_cnt<1> & div_cnt<2> & 
	div_cnt<3> & div_cnt<4> & div_cnt<5> & div_cnt<6> & 
	div_cnt<7> & div_cnt<8>;
   div_cnt<9>.CLK = !clk;
   div_cnt<9>.AR = !nRST;

MACROCELL | 5 | 16 | lcd_RSTB_OBUF
ATTRIBUTES | 8651618 | 0
INPUTS | 15 | cnt<5>  | cnt<0>  | cnt<1>  | cnt<2>  | cnt<3>  | cnt<4>  | cnt<6>  | cnt<7>  | div_cnt<14>  | nRST  | state_FFd3  | state_FFd5  | state_FFd1  | state_FFd4  | state_FFd2
INPUTMC | 14 | 7 | 4 | 7 | 9 | 7 | 8 | 7 | 13 | 1 | 13 | 7 | 6 | 7 | 16 | 1 | 0 | 0 | 13 | 3 | 11 | 7 | 0 | 3 | 9 | 1 | 15 | 7 | 2
INPUTP | 1 | 79
EQ | 5 | 
   lcd_RSTB.D = !cnt<5> & !cnt<0> & !cnt<1> & !cnt<2> & !cnt<3> & 
	!cnt<4> & !cnt<6> & !cnt<7>;
   lcd_RSTB.CLK = div_cnt<14>;
   lcd_RSTB.CE = nRST & !state_FFd3 & !state_FFd5 & !state_FFd1 & 
	!state_FFd4 & !state_FFd2;

MACROCELL | 5 | 11 | lcd_psb_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 0
EQ | 1 | 
   lcd_psb = Vcc;

MACROCELL | 3 | 8 | lcd_rw_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 3 | 7
INPUTS | 6 | data<5>_BUFR  | state_FFd3  | state_FFd5  | state_FFd1  | state_FFd4  | cnt<5>
INPUTMC | 6 | 3 | 7 | 3 | 11 | 7 | 0 | 3 | 9 | 1 | 15 | 7 | 4
EXPORTS | 1 | 3 | 7
EQ | 3 | 
   lcd_rw = Gnd;
    lcd_rw_OBUF.EXP  =  !data<5>_BUFR & state_FFd3 & !state_FFd5 & 
	state_FFd1 & state_FFd4 & !cnt<5>

MACROCELL | 5 | 10 | _10_
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 5 | 9
INPUTS | 8 | data<7>_BUFR  | data<4>  | state_FFd3  | state_FFd5  | state_FFd1  | state_FFd4  | state_FFd2  | cnt<4>
INPUTMC | 8 | 3 | 14 | 5 | 9 | 3 | 11 | 7 | 0 | 3 | 9 | 1 | 15 | 7 | 2 | 7 | 6
EXPORTS | 1 | 5 | 9
EQ | 9 | 
   data<7> = data<7>_BUFR;
    _10_.EXP  =  !data<4> & state_FFd3 & state_FFd5 & !state_FFd1 & 
	state_FFd4 & !state_FFd2
	# !data<4> & state_FFd3 & !state_FFd5 & state_FFd1 & 
	state_FFd4 & cnt<4>
	# !data<4> & state_FFd3 & !state_FFd5 & !state_FFd1 & 
	!state_FFd4 & !state_FFd2
	# !data<4> & !state_FFd3 & state_FFd5 & !state_FFd1 & 
	!state_FFd4 & !state_FFd2

MACROCELL | 5 | 8 | _11_
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 5 | 9
INPUTS | 7 | data<5>_BUFR  | data<4>  | state_FFd3  | state_FFd5  | state_FFd1  | state_FFd4  | cnt<4>
INPUTMC | 7 | 3 | 7 | 5 | 9 | 3 | 11 | 7 | 0 | 3 | 9 | 1 | 15 | 7 | 6
EXPORTS | 1 | 5 | 9
EQ | 5 | 
   data<5> = data<5>_BUFR;
    _11_.EXP  =  !data<4> & !state_FFd3 & state_FFd5 & state_FFd1 & 
	state_FFd4
	# data<4> & state_FFd3 & !state_FFd5 & state_FFd1 & 
	state_FFd4 & !cnt<4>

MACROCELL | 1 | 12 | EXP12_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 1 | 13
INPUTS | 5 | state_FFd5  | cnt<0>  | state_FFd4  | state_FFd2  | state_FFd1
INPUTMC | 5 | 7 | 0 | 7 | 9 | 1 | 15 | 7 | 2 | 3 | 9
EXPORTS | 1 | 1 | 13
EQ | 3 | 
       EXP12_.EXP  =  !state_FFd5 & cnt<0>
	# state_FFd4 & !state_FFd2
	# !state_FFd5 & !state_FFd1 & state_FFd2

MACROCELL | 1 | 14 | EXP13_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 1 | 13
INPUTS | 9 | state_FFd5  | state_FFd4  | cnt<3>  | cnt<1>  | cnt<2>  | cnt<5>  | cnt<4>  | cnt<6>  | cnt<7>
INPUTMC | 9 | 7 | 0 | 1 | 15 | 1 | 13 | 7 | 8 | 7 | 13 | 7 | 4 | 7 | 6 | 7 | 16 | 1 | 0
EXPORTS | 1 | 1 | 13
EQ | 5 | 
       EXP13_.EXP  =  state_FFd5 & !state_FFd4
	# state_FFd5 & !cnt<3>
	# !state_FFd5 & cnt<1>
	# !state_FFd5 & cnt<2>
	# !cnt<5> & !cnt<3> & !cnt<4> & !cnt<6> & !cnt<7>

MACROCELL | 1 | 16 | EXP14_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 1 | 15
INPUTS | 13 | state_FFd3  | state_FFd5  | state_FFd1  | state_FFd4  | state_FFd2  | cnt<5>  | cnt<0>  | cnt<1>  | cnt<2>  | cnt<3>  | cnt<4>  | cnt<6>  | cnt<7>
INPUTMC | 13 | 3 | 11 | 7 | 0 | 3 | 9 | 1 | 15 | 7 | 2 | 7 | 4 | 7 | 9 | 7 | 8 | 7 | 13 | 1 | 13 | 7 | 6 | 7 | 16 | 1 | 0
EXPORTS | 1 | 1 | 15
EQ | 4 | 
       EXP14_.EXP  =  !state_FFd3 & state_FFd5 & state_FFd1 & 
	!state_FFd4 & state_FFd2
	# !state_FFd5 & !cnt<5> & !cnt<0> & !cnt<1> & !cnt<2> & 
	!cnt<3> & !cnt<4> & !cnt<6> & !cnt<7>

MACROCELL | 3 | 2 | EXP15_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 1
INPUTS | 7 | lcd_e  | state_FFd3  | state_FFd5  | state_FFd1  | state_FFd2  | state_FFd4  | EXP16_.EXP
INPUTMC | 7 | 3 | 1 | 3 | 11 | 7 | 0 | 3 | 9 | 7 | 2 | 1 | 15 | 3 | 3
EXPORTS | 1 | 3 | 1
IMPORTS | 1 | 3 | 3
EQ | 15 | 
       EXP15_.EXP  =  lcd_e & state_FFd3 & state_FFd5 & !state_FFd1 & 
	!state_FFd2
	# lcd_e & !state_FFd3 & state_FFd5 & state_FFd1 & 
	state_FFd2
	# lcd_e & !state_FFd3 & state_FFd5 & !state_FFd4 & 
	!state_FFd2
	# state_FFd3 & state_FFd5 & !state_FFd1 & 
	!state_FFd4 & !state_FFd2
	# !state_FFd3 & state_FFd5 & state_FFd1 & 
	!state_FFd4 & !state_FFd2
;Imported pterms FB4_4
	# !state_FFd3 & !state_FFd5 & !state_FFd1 & 
	state_FFd4 & !state_FFd2
	# !state_FFd3 & !state_FFd5 & !state_FFd1 & 
	!state_FFd4 & state_FFd2

MACROCELL | 3 | 3 | EXP16_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 2
INPUTS | 5 | state_FFd3  | state_FFd5  | state_FFd1  | state_FFd4  | state_FFd2
INPUTMC | 5 | 3 | 11 | 7 | 0 | 3 | 9 | 1 | 15 | 7 | 2
EXPORTS | 1 | 3 | 2
EQ | 4 | 
       EXP16_.EXP  =  !state_FFd3 & !state_FFd5 & !state_FFd1 & 
	state_FFd4 & !state_FFd2
	# !state_FFd3 & !state_FFd5 & !state_FFd1 & 
	!state_FFd4 & state_FFd2

MACROCELL | 3 | 6 | EXP17_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 7
INPUTS | 7 | data<5>_BUFR  | state_FFd3  | state_FFd5  | state_FFd1  | state_FFd4  | state_FFd2  | cnt<5>
INPUTMC | 7 | 3 | 7 | 3 | 11 | 7 | 0 | 3 | 9 | 1 | 15 | 7 | 2 | 7 | 4
EXPORTS | 1 | 3 | 7
EQ | 10 | 
       EXP17_.EXP  =  !data<5>_BUFR & !state_FFd3 & state_FFd5 & 
	state_FFd1 & state_FFd4
	# data<5>_BUFR & state_FFd3 & state_FFd5 & 
	!state_FFd1 & state_FFd4 & !state_FFd2
	# data<5>_BUFR & state_FFd3 & !state_FFd5 & 
	state_FFd1 & state_FFd4 & cnt<5>
	# !data<5>_BUFR & state_FFd3 & !state_FFd5 & 
	!state_FFd1 & !state_FFd4 & !state_FFd2
	# !data<5>_BUFR & !state_FFd3 & state_FFd5 & 
	!state_FFd1 & !state_FFd4 & !state_FFd2

MACROCELL | 3 | 13 | EXP18_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 14
INPUTS | 8 | data<7>_BUFR  | state_FFd5  | state_FFd1  | state_FFd4  | state_FFd2  | state_FFd3  | cnt<5>  | cnt<7>
INPUTMC | 8 | 3 | 14 | 7 | 0 | 3 | 9 | 1 | 15 | 7 | 2 | 3 | 11 | 7 | 4 | 1 | 0
EXPORTS | 1 | 3 | 14
EQ | 10 | 
       EXP18_.EXP  =  data<7>_BUFR & !state_FFd5 & !state_FFd1 & 
	!state_FFd4 & !state_FFd2
	# !data<7>_BUFR & !state_FFd3 & state_FFd5 & 
	state_FFd1 & state_FFd4
	# data<7>_BUFR & state_FFd3 & state_FFd5 & 
	!state_FFd1 & state_FFd4 & !state_FFd2
	# !data<7>_BUFR & !state_FFd3 & !state_FFd5 & 
	state_FFd1 & !state_FFd4 & !state_FFd2
	# data<7>_BUFR & state_FFd3 & !state_FFd5 & 
	state_FFd1 & state_FFd4 & !cnt<5> & cnt<7>

MACROCELL | 3 | 15 | EXP19_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 14
INPUTS | 8 | data<7>_BUFR  | state_FFd3  | state_FFd5  | state_FFd1  | state_FFd4  | cnt<6>  | cnt<7>  | cnt<5>
INPUTMC | 8 | 3 | 14 | 3 | 11 | 7 | 0 | 3 | 9 | 1 | 15 | 7 | 16 | 1 | 0 | 7 | 4
EXPORTS | 1 | 3 | 14
EQ | 10 | 
       EXP19_.EXP  =  data<7>_BUFR & state_FFd3 & !state_FFd5 & 
	state_FFd1 & state_FFd4 & !cnt<6> & cnt<7>
	# !data<7>_BUFR & state_FFd3 & !state_FFd5 & 
	state_FFd1 & state_FFd4 & !cnt<5> & !cnt<7>
	# !data<7>_BUFR & state_FFd3 & !state_FFd5 & 
	state_FFd1 & state_FFd4 & !cnt<6> & !cnt<7>
	# data<7>_BUFR & state_FFd3 & !state_FFd5 & 

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