📄 lcd.vm6

📁 Mars-XC2S50-S-Core-V2.0开发板核心板的说明和设计文档
💻 VM6
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INPUT_NODE_TYPE | 3 | 8 | SRFF_R
SIGNAL | NODE | div_counter<0>.RSTF | 9909 | ? | 0 | 4096 | div_counter<0> | NULL | NULL | div_counter<0>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_FALSE | Reset_IBUF
INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
SIGNAL | NODE | div_counter<0>.CE | 9910 | ? | 0 | 4096 | div_counter<0> | NULL | NULL | div_counter<0>.SI | 10 | 9 | MC_SI_CE
SPPTERM | 7 | IV_FALSE | state<7> | IV_FALSE | state<9> | IV_FALSE | state<5> | IV_FALSE | state<4> | IV_FALSE | state<2> | IV_FALSE | state<3> | IV_FALSE | state<0>
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | div_counter<0>.Q | 9911 | ? | 0 | 0 | div_counter<0> | NULL | NULL | div_counter<0>.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | PrldLow+OptxMapped | div_counter<1> | lcd_COPY_0_COPY_0 | 2155873280 | 12 | 1
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<0> | 9820 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<0>.Q | div_counter<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<1> | 9821 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<1>.Q | div_counter<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | flag | 9848 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | flag.Q | flag | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_int | 9843 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | clk_int.Q | clk_int | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | Reset_IBUF | 9819 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | NULL | Reset_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<7> | 9837 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<7>.Q | state<7> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<9> | 9838 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<9>.Q | state<9> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<5> | 9839 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<5>.Q | state<5> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<4> | 9840 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<4>.Q | state<4> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<2> | 9841 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<2>.Q | state<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<3> | 9842 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<3>.Q | state<3> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<0> | 9844 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<0>.Q | state<0> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | div_counter<1> | 9821 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<1>.Q | div_counter<1> | 1 | 0 | MC_UIM

SIGNAL_INSTANCE | div_counter<1>.SI | div_counter<1> | 0 | 12 | 5
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<0> | 9820 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<0>.Q | div_counter<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<1> | 9821 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<1>.Q | div_counter<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | flag | 9848 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | flag.Q | flag | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_int | 9843 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | clk_int.Q | clk_int | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | Reset_IBUF | 9819 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | NULL | Reset_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<7> | 9837 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<7>.Q | state<7> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<9> | 9838 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<9>.Q | state<9> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<5> | 9839 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<5>.Q | state<5> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<4> | 9840 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<4>.Q | state<4> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<2> | 9841 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<2>.Q | state<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<3> | 9842 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<3>.Q | state<3> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<0> | 9844 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<0>.Q | state<0> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | div_counter<1>.D1 | 9913 | ? | 0 | 4096 | div_counter<1> | NULL | NULL | div_counter<1>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | div_counter<1>.D2 | 9914 | ? | 0 | 4096 | div_counter<1> | NULL | NULL | div_counter<1>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 3 | IV_TRUE | div_counter<0> | IV_FALSE | div_counter<1> | IV_TRUE | flag
SPPTERM | 3 | IV_FALSE | div_counter<0> | IV_TRUE | div_counter<1> | IV_TRUE | flag
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | div_counter<1>.CLKF | 9915 | ? | 0 | 4096 | div_counter<1> | NULL | NULL | div_counter<1>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | clk_int
OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF
SIGNAL | NODE | div_counter<1>.RSTF | 9916 | ? | 0 | 4096 | div_counter<1> | NULL | NULL | div_counter<1>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_FALSE | Reset_IBUF
OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
SIGNAL | NODE | div_counter<1>.CE | 9917 | ? | 0 | 4096 | div_counter<1> | NULL | NULL | div_counter<1>.SI | 10 | 9 | MC_SI_CE
SPPTERM | 7 | IV_FALSE | state<7> | IV_FALSE | state<9> | IV_FALSE | state<5> | IV_FALSE | state<4> | IV_FALSE | state<2> | IV_FALSE | state<3> | IV_FALSE | state<0>

SRFF_INSTANCE | div_counter<1>.REG | div_counter<1> | 0 | 4 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | div_counter<1>.D | 9912 | ? | 0 | 0 | div_counter<1> | NULL | NULL | div_counter<1>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | div_counter<1>.CLKF | 9915 | ? | 0 | 4096 | div_counter<1> | NULL | NULL | div_counter<1>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | clk_int
INPUT_NODE_TYPE | 3 | 8 | SRFF_R
SIGNAL | NODE | div_counter<1>.RSTF | 9916 | ? | 0 | 4096 | div_counter<1> | NULL | NULL | div_counter<1>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_FALSE | Reset_IBUF
INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
SIGNAL | NODE | div_counter<1>.CE | 9917 | ? | 0 | 4096 | div_counter<1> | NULL | NULL | div_counter<1>.SI | 10 | 9 | MC_SI_CE
SPPTERM | 7 | IV_FALSE | state<7> | IV_FALSE | state<9> | IV_FALSE | state<5> | IV_FALSE | state<4> | IV_FALSE | state<2> | IV_FALSE | state<3> | IV_FALSE | state<0>
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | div_counter<1>.Q | 9918 | ? | 0 | 0 | div_counter<1> | NULL | NULL | div_counter<1>.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | div_counter<2> | lcd_COPY_0_COPY_0 | 2155877376 | 13 | 1
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<0> | 9820 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<0>.Q | div_counter<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<1> | 9821 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<1>.Q | div_counter<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | flag | 9848 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | flag.Q | flag | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<2> | 9822 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<2>.Q | div_counter<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_int | 9843 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | clk_int.Q | clk_int | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | Reset_IBUF | 9819 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | NULL | Reset_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<7> | 9837 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<7>.Q | state<7> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<9> | 9838 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<9>.Q | state<9> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<5> | 9839 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<5>.Q | state<5> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<4> | 9840 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<4>.Q | state<4> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<2> | 9841 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<2>.Q | state<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<3> | 9842 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<3>.Q | state<3> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<0> | 9844 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<0>.Q | state<0> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | div_counter<2> | 9822 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<2>.Q | div_counter<2> | 1 | 0 | MC_UIM

SIGNAL_INSTANCE | div_counter<2>.SI | div_counter<2> | 0 | 13 | 5
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<0> | 9820 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<0>.Q | div_counter<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<1> | 9821 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<1>.Q | div_counter<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | flag | 9848 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | flag.Q | flag | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<2> | 9822 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<2>.Q | div_counter<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_int | 9843 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | clk_int.Q | clk_int | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | Reset_IBUF | 9819 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | NULL | Reset_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<7> | 9837 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<7>.Q | state<7> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<9> | 9838 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<9>.Q | state<9> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<5> | 9839 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<5>.Q | state<5> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<4> | 9840 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<4>.Q | state<4> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<2> | 9841 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<2>.Q | state<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<3> | 9842 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<3>.Q | state<3> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state<0> | 9844 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state<0>.Q | state<0> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | div_counter<2>.D1 | 9920 | ? | 0 | 4096 | div_counter<2> | NULL | NULL | div_counter<2>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | div_counter<2>.D2 | 9921 | ? | 0 | 4096 | div_counter<2> | NULL | NULL | div_counter<2>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 2 | IV_TRUE | div_counter<2> | IV_FALSE | flag
SPPTERM | 3 | IV_TRUE | div_counter<0> | IV_TRUE | div_counter<1> | IV_TRUE | flag
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | div_counter<2>.CLKF | 9922 | ? | 0 | 4096 | div_counter<2> | NULL | NULL | div_counter<2>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | clk_int
OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF
SIGNAL | NODE | div_counter<2>.RSTF | 9923 | ? | 0 | 4096 | div_counter<2> | NULL | NULL | div_counter<2>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_FALSE | Reset_IBUF
OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
SIGNAL | NODE | div_counter<2>.CE | 9924 | ? | 0 | 4096 | div_counter<2> | NULL | NULL | div_counter<2>.SI | 10 | 9 | MC_SI_CE
SPPTERM | 7 | IV_FALSE | state<7> | IV_FALSE | state<9> | IV_FALSE | state<5> | IV_FALSE | state<4> | IV_FALSE | state<2> | IV_FALSE | state<3> | IV_FALSE | state<0>

SRFF_INSTANCE | div_counter<2>.REG | div_counter<2> | 0 | 4 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | div_counter<2>.D | 9919 | ? | 0 | 0 | div_counter<2> | NULL | NULL | div_counter<2>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | div_counter<2>.CLKF | 9922 | ? | 0 | 4096 | div_counter<2> | NULL | NULL | div_counter<2>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | clk_int
INPUT_NODE_TYPE | 3 | 8 | SRFF_R
SIGNAL | NODE | div_counter<2>.RSTF | 9923 | ? | 0 | 4096 | div_counter<2> | NULL | NULL | div_counter<2>.SI | 6 | 9 | MC_SI_RSTF
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