sub.mfd

来自「Mars-XC2S50-S-Core-V2.0开发板核心板的说明和设计文档」· MFD 代码 · 共 1,209 行 · 第 1/5 页

MFD
1,209 行
字号
12345
MACROCELL | 3 | 2 | en_7_OBUF$BUF5
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 3 | 1
INPUTS | 0
EXPORTS | 1 | 3 | 1
EQ | 2 | 
   en<1> = Vcc;
    en_7_OBUF$BUF5.EXP  =  Vcc

MACROCELL | 5 | 10 | en_7_OBUF$BUF6
ATTRIBUTES | 264962 | 0
INPUTS | 0
EQ | 1 | 
   c<0> = Vcc;

MACROCELL | 7 | 17 | Msub_c_tmp_Mxor_Result<1>__n0002<0>/Msub_c_tmp_Mxor_Result<1>__n0002<0>_D
ATTRIBUTES | 133888 | 0
OUTPUTMC | 8 | 3 | 0 | 5 | 1 | 3 | 1 | 3 | 17 | 5 | 0 | 5 | 2 | 5 | 17 | 7 | 16
INPUTS | 7 | b<1>  | a<1>  | a<0>  | b<0>  | c<3>_BUFR  | Msub_c_tmp__n00023/Msub_c_tmp__n00023_D2  | Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
INPUTMC | 3 | 0 | 2 | 0 | 13 | 2 | 17
INPUTP | 4 | 64 | 74 | 77 | 66
EXPORTS | 1 | 7 | 16
EQ | 11 | 
   !Msub_c_tmp_Mxor_Result<1>__n0002<0>/Msub_c_tmp_Mxor_Result<1>__n0002<0>_D = b<1>
	$ a<1>;
    Msub_c_tmp_Mxor_Result<1>__n0002<0>/Msub_c_tmp_Mxor_Result<1>__n0002<0>_D.EXP  =  a<0> & !b<0> & !a<1> & b<1> & !c<3>_BUFR & 
	Msub_c_tmp__n00023/Msub_c_tmp__n00023_D2 & 
	Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# a<0> & !b<0> & !a<1> & b<1> & !c<3>_BUFR & 
	!Msub_c_tmp__n00023/Msub_c_tmp__n00023_D2 & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# !a<0> & b<0> & !a<1> & !b<1> & !c<3>_BUFR & 
	!Msub_c_tmp__n00023/Msub_c_tmp__n00023_D2 & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D

MACROCELL | 7 | 0 | $OpTx$Msub_c_tmp__n0016<0>/Msub_c_tmp__n0016<0>_D2_INV$400
ATTRIBUTES | 133888 | 0
OUTPUTMC | 8 | 3 | 0 | 5 | 1 | 3 | 1 | 3 | 16 | 3 | 17 | 5 | 2 | 5 | 3 | 5 | 17
INPUTS | 4 | a<0>  | b<0>  | a<1>  | b<1>
INPUTP | 4 | 77 | 66 | 74 | 64
EQ | 3 | 
   $OpTx$Msub_c_tmp__n0016<0>/Msub_c_tmp__n0016<0>_D2_INV$400 = !a<1> & b<1>
	# !a<0> & b<0> & !a<1>
	# !a<0> & b<0> & b<1>;

MACROCELL | 0 | 4 | Msub_c_tmp_Mxor_Result<2>__n0002<0>/Msub_c_tmp_Mxor_Result<2>__n0002<0>_D
ATTRIBUTES | 133888 | 0
OUTPUTMC | 13 | 3 | 0 | 1 | 15 | 7 | 15 | 1 | 13 | 1 | 14 | 1 | 16 | 1 | 17 | 3 | 1 | 3 | 16 | 3 | 17 | 7 | 13 | 7 | 14 | 7 | 16
INPUTS | 2 | b<2>  | a<2>
INPUTP | 2 | 63 | 72
EQ | 2 | 
   !Msub_c_tmp_Mxor_Result<2>__n0002<0>/Msub_c_tmp_Mxor_Result<2>__n0002<0>_D = b<2>
	$ a<2>;

MACROCELL | 0 | 13 | Msub_c_tmp__n00023/Msub_c_tmp__n00023_D2
ATTRIBUTES | 133888 | 0
OUTPUTMC | 14 | 3 | 0 | 0 | 7 | 7 | 14 | 0 | 5 | 0 | 6 | 0 | 8 | 0 | 9 | 3 | 1 | 3 | 16 | 3 | 17 | 7 | 13 | 7 | 16 | 7 | 17 | 0 | 14
INPUTS | 8 | a<1>  | b<1>  | a<2>  | a<0>  | b<0>  | Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D  | b<2>  | EXP22_.EXP
INPUTMC | 2 | 2 | 17 | 0 | 12
INPUTP | 6 | 74 | 64 | 72 | 77 | 66 | 63
EXPORTS | 1 | 0 | 14
IMPORTS | 1 | 0 | 12
EQ | 17 | 
   Msub_c_tmp__n00023/Msub_c_tmp__n00023_D2 = !a<1> & b<1> & !a<2>
;Imported pterms FB1_13
	# !a<2> & b<2>
	# !a<1> & b<1> & b<2>
	# !a<0> & b<0> & !a<1> & !a<2>
	# !a<0> & b<0> & b<1> & !a<2>
	# !a<0> & b<0> & b<1> & b<2>
;Imported pterms FB1_12
	# !a<0> & b<0> & !a<1> & b<2>;
    Msub_c_tmp__n00023/Msub_c_tmp__n00023_D2.EXP  =  a<0> & !b<0> & !a<1> & b<1> & !a<2> & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# a<0> & !b<0> & !a<1> & b<1> & b<2> & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# !a<0> & b<0> & a<1> & b<1> & !a<2> & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# !a<0> & b<0> & !a<1> & !b<1> & b<2> & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D

MACROCELL | 2 | 17 | Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
ATTRIBUTES | 133888 | 0
OUTPUTMC | 27 | 0 | 15 | 0 | 2 | 1 | 14 | 0 | 7 | 7 | 14 | 5 | 1 | 0 | 0 | 0 | 1 | 0 | 3 | 0 | 5 | 0 | 6 | 0 | 8 | 0 | 9 | 0 | 13 | 0 | 14 | 0 | 16 | 0 | 17 | 1 | 13 | 1 | 16 | 1 | 17 | 5 | 0 | 5 | 2 | 5 | 3 | 5 | 17 | 7 | 13 | 7 | 16 | 7 | 17
INPUTS | 2 | b<3>  | a<3>
INPUTP | 2 | 62 | 69
EQ | 2 | 
   !Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D = b<3>
	$ a<3>;

MACROCELL | 5 | 3 | _10_
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 5 | 2
INPUTS | 8 | c<5>_BUFR  | a<0>  | b<0>  | a<2>  | b<2>  | c<3>_BUFR  | $OpTx$Msub_c_tmp__n0016<0>/Msub_c_tmp__n0016<0>_D2_INV$400  | Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
INPUTMC | 4 | 0 | 7 | 0 | 2 | 7 | 0 | 2 | 17
INPUTP | 4 | 77 | 66 | 72 | 63
EXPORTS | 1 | 5 | 2
EQ | 7 | 
   c<5> = c<5>_BUFR;
    _10_.EXP  =  a<0> & !b<0> & a<2> & !b<2> & !c<3>_BUFR & 
	!$OpTx$Msub_c_tmp__n0016<0>/Msub_c_tmp__n0016<0>_D2_INV$400 & 
	Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# a<0> & !b<0> & !a<2> & b<2> & !c<3>_BUFR & 
	$OpTx$Msub_c_tmp__n0016<0>/Msub_c_tmp__n0016<0>_D2_INV$400 & 
	Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D

MACROCELL | 5 | 8 | _11_
ATTRIBUTES | 264962 | 0
INPUTS | 1 | c<2>_BUFR
INPUTMC | 1 | 0 | 15
EQ | 1 | 
   c<2> = c<2>_BUFR;

MACROCELL | 5 | 7 | _12_
ATTRIBUTES | 264962 | 0
INPUTS | 1 | c<4>_BUFR
INPUTMC | 1 | 1 | 15
EQ | 1 | 
   c<4> = c<4>_BUFR;

MACROCELL | 5 | 9 | _13_
ATTRIBUTES | 264962 | 0
INPUTS | 1 | c<3>_BUFR
INPUTMC | 1 | 0 | 2
EQ | 1 | 
   c<3> = c<3>_BUFR;

MACROCELL | 0 | 0 | EXP14_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 0 | 1
INPUTS | 7 | a<0>  | b<0>  | a<2>  | b<2>  | Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D  | a<1>  | b<1>
INPUTMC | 1 | 2 | 17
INPUTP | 6 | 77 | 66 | 72 | 63 | 74 | 64
EXPORTS | 1 | 0 | 1
EQ | 9 | 
       EXP14_.EXP  =  a<0> & !b<0> & !a<2> & b<2> & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# a<1> & b<1> & !a<2> & b<2> & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# !a<1> & !b<1> & a<2> & !b<2> & 
	Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# !a<1> & !b<1> & !a<2> & b<2> & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# !a<0> & b<0> & !a<1> & b<1> & !a<2> & b<2>

MACROCELL | 0 | 1 | EXP15_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 0 | 2
INPUTS | 8 | a<0>  | b<0>  | a<2>  | Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D  | a<1>  | b<2>  | b<1>  | EXP14_.EXP
INPUTMC | 2 | 2 | 17 | 0 | 0
INPUTP | 6 | 77 | 66 | 72 | 74 | 63 | 64
EXPORTS | 1 | 0 | 2
IMPORTS | 1 | 0 | 0
EQ | 19 | 
       EXP15_.EXP  =  !a<0> & b<0> & !a<2> & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# a<0> & !b<0> & a<1> & !b<2> & 
	Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# a<0> & !b<0> & b<1> & !a<2> & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# a<0> & !b<0> & b<1> & b<2> & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# !a<0> & b<0> & !a<1> & b<1> & a<2> & !b<2>
;Imported pterms FB1_1
	# a<0> & !b<0> & !a<2> & b<2> & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# a<1> & b<1> & !a<2> & b<2> & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# !a<1> & !b<1> & a<2> & !b<2> & 
	Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# !a<1> & !b<1> & !a<2> & b<2> & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# !a<0> & b<0> & !a<1> & b<1> & !a<2> & b<2>

MACROCELL | 0 | 3 | EXP16_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 0 | 2
INPUTS | 7 | a<0>  | b<0>  | b<2>  | Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D  | b<1>  | a<2>  | a<1>
INPUTMC | 1 | 2 | 17
INPUTP | 6 | 77 | 66 | 63 | 64 | 72 | 74
EXPORTS | 1 | 0 | 2
EQ | 10 | 
       EXP16_.EXP  =  !a<0> & b<0> & b<2> & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# a<0> & !b<0> & !b<1> & a<2> & 
	Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# a<0> & !b<0> & !b<1> & !b<2> & 
	Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# a<0> & !b<0> & a<2> & !b<2> & 
	Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# a<1> & b<1> & a<2> & !b<2> & 
	Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D

MACROCELL | 0 | 5 | EXP17_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 0 | 6
INPUTS | 9 | a<2>  | b<2>  | Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D  | a<0>  | a<1>  | b<1>  | c<3>_BUFR  | b<0>  | Msub_c_tmp__n00023/Msub_c_tmp__n00023_D2
INPUTMC | 3 | 2 | 17 | 0 | 2 | 0 | 13
INPUTP | 6 | 72 | 63 | 77 | 74 | 64 | 66
EXPORTS | 1 | 0 | 6
EQ | 7 | 
       EXP17_.EXP  =  !a<2> & !b<2> & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# a<0> & a<1> & !b<1> & c<3>_BUFR
	# !a<0> & b<0> & !a<1> & b<1>
	# !a<1> & b<1> & 
	!Msub_c_tmp__n00023/Msub_c_tmp__n00023_D2 & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D

MACROCELL | 0 | 6 | EXP18_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 0 | 7
INPUTS | 10 | a<1>  | b<2>  | Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D  | b<1>  | Msub_c_tmp__n00023/Msub_c_tmp__n00023_D2  | a<2>  | a<0>  | b<0>  | c<3>_BUFR  | EXP17_.EXP
INPUTMC | 4 | 2 | 17 | 0 | 13 | 0 | 2 | 0 | 5
INPUTP | 6 | 74 | 63 | 64 | 72 | 77 | 66
EXPORTS | 1 | 0 | 7
IMPORTS | 1 | 0 | 5
EQ | 18 | 
       EXP18_.EXP  =  a<1> & b<2> & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# !b<1> & b<2> & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# a<1> & b<1> & 
	!Msub_c_tmp__n00023/Msub_c_tmp__n00023_D2 & 
	Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# a<1> & !a<2> & b<2> & 
	!Msub_c_tmp__n00023/Msub_c_tmp__n00023_D2
	# !a<0> & b<0> & a<1> & !b<1> & !c<3>_BUFR
;Imported pterms FB1_6
	# !a<2> & !b<2> & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D
	# a<0> & a<1> & !b<1> & c<3>_BUFR
	# !a<0> & b<0> & !a<1> & b<1>
	# !a<1> & b<1> & 
	!Msub_c_tmp__n00023/Msub_c_tmp__n00023_D2 & 
	!Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D

MACROCELL | 0 | 8 | EXP19_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 0 | 7
INPUTS | 8 | a<1>  | b<1>  | c<3>_BUFR  | a<2>  | b<2>  | Msub_c_tmp_Mxor_Result<3>__n0002<0>/Msub_c_tmp_Mxor_Result<3>__n0002<0>_D  | Msub_c_tmp__n00023/Msub_c_tmp__n00023_D2  | EXP20_.EXP
INPUTMC | 4 | 0 | 2 | 2 | 17 | 0 | 13 | 0 | 9
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sub.mfd - 源码说明

本页面展示了「Mars-XC2S50-S-Core-V2.0开发板核心板的说明和设计文档」中的 sub.mfd 源码文件，采用 MFD 编程语言编写，共 1,209 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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