dial.rpt

Mars-XC2S50-S-Core-V2.0开发板核心板的说明和设计文档

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
dataout<1>           ........................................ 0
en<2>                XXXXXXXXXXXXXXXXX.XX...X................ 20
en<6>                XXXXXXXXXXXXXXXXX...XX.X................ 20
en<1>                XXXXXXXXXXXXXXXXXXX....X................ 20
en<0>                XXXXXXXXXXXXXXXXXX....XX................ 20
en<7>                XXXXXXXXXXXXXXXXX....XXX................ 20
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB5  ***********************************
Number of function block inputs used/remaining:               15/39
Number of signals used by logic mapping into function block:  15
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0     0   5     FB5_1         (b)     
(unused)              0       0     0   5     FB5_2   52    I/O     
(unused)              0       0     0   5     FB5_3   59    I/O     I
(unused)              0       0     0   5     FB5_4         (b)     
(unused)              0       0     0   5     FB5_5   53    I/O     
(unused)              0       0     0   5     FB5_6   54    I/O     
(unused)              0       0     0   5     FB5_7   66    I/O     I
(unused)              0       0     0   5     FB5_8   56    I/O     I
(unused)              0       0     0   5     FB5_9   57    I/O     I
(unused)              0       0     0   5     FB5_10  68    I/O     
(unused)              0       0     0   5     FB5_11  58    I/O     I
(unused)              0       0     0   5     FB5_12  60    I/O     
(unused)              0       0     0   5     FB5_13  70    I/O     
(unused)              0       0   \/3   2     FB5_14  61    I/O     I
(unused)              0       0   \/5   0     FB5_15  64    I/O     I
$OpTx$DEC_dataout_buf<0>$1
                     23      18<-   0   0     FB5_16        (b)     (b)
(unused)              0       0   /\5   0     FB5_17  69    I/O     I
(unused)              0       0   /\5   0     FB5_18        (b)     (b)

Signals Used by Logic in Function Block
  1: $OpTx$$OpTx$FX_DC$16_INV$175   6: datain<6>         11: en<3> 
  2: datain<0>                      7: datain<7>         12: en<4> 
  3: datain<1>                      8: en<0>             13: en<5> 
  4: datain<2>                      9: en<1>             14: en<6> 
  5: datain<4>                     10: en<2>             15: en<7> 

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
$OpTx$DEC_dataout_buf<0>$1 
                     XXXXXXXXXXXXXXX......................... 15
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB6  ***********************************
Number of function block inputs used/remaining:               37/17
Number of signals used by logic mapping into function block:  37
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0   \/5   0     FB6_1         (b)     (b)
dataout<7>           25      20<-   0   0     FB6_2   106   I/O     O
(unused)              0       0   /\5   0     FB6_3         (b)     (b)
dataout<5>            0       0   /\4   1     FB6_4   111   I/O     O
(unused)              0       0   \/5   0     FB6_5   110   I/O     (b)
(unused)              0       0   \/5   0     FB6_6   112   I/O     (b)
(unused)              0       0   \/5   0     FB6_7         (b)     (b)
dataout<4>           25      20<-   0   0     FB6_8   113   I/O     O
dataout<2>            3       3<- /\5   0     FB6_9   116   I/O     O
dataout<3>            3       1<- /\3   0     FB6_10  115   I/O     O
dataout<0>            0       0   /\1   4     FB6_11  119   I/O     O
en<3>                 4       0     0   1     FB6_12  120   I/O     O
(unused)              0       0     0   5     FB6_13        (b)     
(unused)              0       0     0   5     FB6_14  121   I/O     
en<4>                 4       0     0   1     FB6_15  124   I/O     O
(unused)              0       0     0   5     FB6_16  117   I/O     
en<5>                 4       0   \/1   0     FB6_17  125   I/O     O
(unused)              0       0   \/5   0     FB6_18        (b)     (b)

Signals Used by Logic in Function Block
  1: $OpTx$$OpTx$FX_DC$16_INV$175  14: cnt<3>            26: datain<5> 
  2: $OpTx$DEC_dataout_buf<0>$0    15: cnt<4>            27: datain<6> 
  3: $OpTx$DEC_dataout_buf<0>$1    16: cnt<5>            28: datain<7> 
  4: clk                           17: cnt<6>            29: en<0> 
  5: cnt<0>                        18: cnt<7>            30: en<1> 
  6: cnt<10>                       19: cnt<8>            31: en<2> 
  7: cnt<11>                       20: cnt<9>            32: en<3> 
  8: cnt<12>                       21: datain<0>         33: en<4> 
  9: cnt<13>                       22: datain<1>         34: en<5> 
 10: cnt<14>                       23: datain<2>         35: en<6> 
 11: cnt<15>                       24: datain<3>         36: en<7> 
 12: cnt<1>                        25: datain<4>         37: rst 
 13: cnt<2>                       

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
dataout<7>           X...................XXXXXXXXXXXXXXXX.... 17
dataout<5>           ........................................ 0
dataout<4>           X...................XXXXXXXXXXXXXXXX.... 17
dataout<2>           ..X....................X.X..XXXXXXXX.... 11
dataout<3>           .X.....................X.X..XXXXXXXX.... 11
dataout<0>           ........................................ 0
en<3>                ...XXXXXXXXXXXXXXXXX..........XX....X... 20
en<4>                ...XXXXXXXXXXXXXXXXX...........XX...X... 20
en<5>                ...XXXXXXXXXXXXXXXXX............XX..X... 20
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB7  ***********************************
Number of function block inputs used/remaining:               15/39
Number of signals used by logic mapping into function block:  15
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0     0   5     FB7_1         (b)     
(unused)              0       0     0   5     FB7_2   71    I/O     I
(unused)              0       0     0   5     FB7_3   75    I/O     
(unused)              0       0     0   5     FB7_4         (b)     
(unused)              0       0     0   5     FB7_5   74    I/O     
(unused)              0       0     0   5     FB7_6   76    I/O     
(unused)              0       0     0   5     FB7_7   77    I/O     
(unused)              0       0     0   5     FB7_8   78    I/O     
(unused)              0       0     0   5     FB7_9   80    I/O     
(unused)              0       0     0   5     FB7_10  79    I/O     
(unused)              0       0     0   5     FB7_11  82    I/O     
(unused)              0       0     0   5     FB7_12  85    I/O     
(unused)              0       0     0   5     FB7_13  81    I/O     
(unused)              0       0   \/3   2     FB7_14  86    I/O     (b)
(unused)              0       0   \/5   0     FB7_15  87    I/O     (b)
$OpTx$DEC_dataout_buf<0>$0
                     23      18<-   0   0     FB7_16  83    I/O     (b)
(unused)              0       0   /\5   0     FB7_17  88    I/O     (b)
(unused)              0       0   /\5   0     FB7_18        (b)     (b)

Signals Used by Logic in Function Block
  1: $OpTx$$OpTx$FX_DC$16_INV$175   6: datain<6>         11: en<3> 
  2: datain<0>                      7: datain<7>         12: en<4> 
  3: datain<1>                      8: en<0>             13: en<5> 
  4: datain<2>                      9: en<1>             14: en<6> 
  5: datain<4>                     10: en<2>             15: en<7> 

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
$OpTx$DEC_dataout_buf<0>$0 
                     XXXXXXXXXXXXXXX......................... 15
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB8  ***********************************
Number of function block inputs used/remaining:               0/54
Number of signals used by logic mapping into function block:  0
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0     0   5     FB8_1         (b)     
(unused)              0       0     0   5     FB8_2   91    I/O     
(unused)              0       0     0   5     FB8_3   95    I/O     
(unused)              0       0     0   5     FB8_4   97    I/O     
(unused)              0       0     0   5     FB8_5   92    I/O     
(unused)              0       0     0   5     FB8_6   93    I/O     
(unused)              0       0     0   5     FB8_7         (b)     
(unused)              0       0     0   5     FB8_8   94    I/O     
(unused)              0       0     0   5     FB8_9   96    I/O     
(unused)              0       0     0   5     FB8_10  101   I/O     
(unused)              0       0     0   5     FB8_11  98    I/O     
(unused)              0       0     0   5     FB8_12  100   I/O     
(unused)              0       0     0   5     FB8_13  103   I/O     
(unused)              0       0     0   5     FB8_14  102   I/O     
(unused)              0       0     0   5     FB8_15  104   I/O     
dataout<6>            0       0     0   5     FB8_16  107   I/O     O
(unused)              0       0     0   5     FB8_17  105   I/O     
(unused)              0       0     0   5     FB8_18        (b)     

Signals Used by Logic in Function Block

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
dataout<6>           ........................................ 0
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*******************************  Equations  ********************************

********** Mapped Logic **********


assign $OpTx$$OpTx$FX_DC$16_INV$175 = (en[5] && en[3]);


assign $OpTx$DEC_dataout_buf[0]$0 = ((EXP21_.EXP)
	|| (EXP22_.EXP)
	|| (!en[7] && datain[7])
	|| (!en[6] && !en[4] && datain[7])
	|| (!en[6] && datain[7] && !$OpTx$$OpTx$FX_DC$16_INV$175)
	|| (!en[4] && datain[7] && !$OpTx$$OpTx$FX_DC$16_INV$175)
	|| (!en[5] && !en[3] && datain[7]));


assign $OpTx$DEC_dataout_buf[0]$1 = ((EXP11_.EXP)
	|| (EXP12_.EXP)
	|| (!en[7] && datain[7])
	|| (!en[6] && !en[4] && datain[7])
	|| (!en[6] && datain[7] && !$OpTx$$OpTx$FX_DC$16_INV$175)
	|| (!en[4] && datain[7] && !$OpTx$$OpTx$FX_DC$16_INV$175)
	|| (!en[5] && !en[3] && datain[7]));





























FDCPE FDCPE_cnt0 (cnt[0],cnt_D[0],clk,1'b0,1'b0);
assign cnt_D[0] = (rst && !cnt[0]);

FDCPE FDCPE_cnt1 (cnt[1],cnt_D[1],clk,1'b0,1'b0);
assign cnt_D[1] = ((rst && cnt[0] && !cnt[1])
	|| (rst && !cnt[0] && cnt[1]));

FTCPE FTCPE_cnt2 (cnt[2],cnt_T[2],clk,1'b0,1'b0);
assign cnt_T[2] = ((!rst && cnt[2])
	|| (rst && cnt[0] && cnt[1]));

FTCPE FTCPE_cnt3 (cnt[3],cnt_T[3],clk,1'b0,1'b0);
assign cnt_T[3] = ((!rst && cnt[3])
	|| (rst && cnt[0] && cnt[1] && cnt[2]));

FTCPE FTCPE_cnt4 (cnt[4],cnt_T[4],clk,1'b0,1'b0);
assign cnt_T[4] = ((!rst && cnt[4])
	|| (rst && cnt[0] && cnt[1] && cnt[2] && cnt[3]));

FTCPE FTCPE_cnt5 (cnt[5],cnt_T[5],clk,1'b0,1'b0);
assign cnt_T[5] = ((!rst && cnt[5])
	|| (rst && cnt[0] && cnt[1] && cnt[2] && cnt[3] && 
	cnt[4]));

FTCPE FTCPE_cnt6 (cnt[6],cnt_T[6],clk,1'b0,1'b0);
assign cnt_T[6] = ((!rst && cnt[6])
	|| (rst && cnt[0] && cnt[1] && cnt[2] && cnt[3] && 
	cnt[4] && cnt[5]));

FTCPE FTCPE_cnt7 (cnt[7],cnt_T[7],clk,1'b0,1'b0);
assign cnt_T[7] = ((!rst && cnt[7])
	|| (rst && cnt[0] && cnt[1] && cnt[2] && cnt[3] && 
	cnt[4] && cnt[5] && cnt[6]));

FTCPE FTCPE_cnt8 (cnt[8],cnt_T[8],clk,1'b0,1'b0);
assign cnt_T[8] = ((!rst && cnt[8])
	|| (rst && cnt[0] && cnt[1] && cnt[2] && cnt[3] && 
	cnt[4] && cnt[5] && cnt[6] && cnt[7]));

FTCPE FTCPE_cnt9 (cnt[9],cnt_T[9],clk,1'b0,1'b0);
assign cnt_T[9] = ((!rst && cnt[9])
	|| (rst && cnt[0] && cnt[1] && cnt[2] && cnt[3] && 
	cnt[4] && cnt[5] && cnt[6] && cnt[7] && cnt[8]));

FTCPE FTCPE_cnt10 (cnt[10],cnt_T[10],clk,1'b0,1'b0);
assign cnt_T[10] = ((!rst && cnt[10])
	|| (rst && cnt[0] && cnt[1] && cnt[2] && cnt[3] && 
	cnt[4] && cnt[5] && cnt[6] && cnt[7] && cnt[8] && cnt[9]));

FTCPE FTCPE_cnt11 (cnt[11],cnt_T[11],clk,1'b0,1'b0);
assign cnt_T[11] = ((!rst && cnt[11])
	|| (rst && cnt[0] && cnt[10] && cnt[1] && cnt[2] &&