📄 dial.rpt
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cpldfit: version H.42 Xilinx Inc.
Fitter Report
Design Name: dial Date: 2-21-2006, 3:06PM
Device Used: XC95144XL-10-TQ144
Fitting Status: Successful
************************* Mapped Resource Summary **************************
Macrocells Product Terms Function Block Registers Pins
Used/Tot Used/Tot Inps Used/Tot Used/Tot Used/Tot
35 /144 ( 24%) 182 /720 ( 25%) 111/432 ( 26%) 24 /144 ( 17%) 26 /117 ( 22%)
** Function Block Resources **
Function Mcells FB Inps Pterms IO
Block Used/Tot Used/Tot Used/Tot Used/Tot
FB1 16/18 18/54 47/90 0/15
FB2 1/18 2/54 1/90 0/15
FB3 0/18 0/54 0/90 0/15
FB4 6/18 24/54 20/90 6/15
FB5 1/18 15/54 23/90 0/14
FB6 9/18 37/54 68/90 9/13
FB7 1/18 15/54 23/90 0/15
FB8 1/18 0/54 0/90 1/15
----- ----- ----- -----
35/144 111/432 182/720 16/117
* - Resource is exhausted
** Global Control Resources **
Global clock net(s) unused.
Global output enable net(s) unused.
Global set/reset net(s) unused.
** Pin Resources **
Signal Type Required Mapped | Pin Type Used Total
------------------------------------|------------------------------------
Input : 10 10 | I/O : 26 109
Output : 16 16 | GCK/IO : 0 3
Bidirectional : 0 0 | GTS/IO : 0 4
GCK : 0 0 | GSR/IO : 0 1
GTS : 0 0 |
GSR : 0 0 |
---- ----
Total 26 26
** Power Data **
There are 35 macrocells in high performance mode (MCHP).
There are 0 macrocells in low power mode (MCLP).
End of Mapped Resource Summary
************************* Summary of Mapped Logic ************************
** 16 Outputs **
Signal Total Total Loc Pin Pin Pin Pwr Slew Reg Init
Name Pts Inps No. Type Use Mode Rate State
dataout<1> 0 0 FB4_1 118 I/O O STD FAST
en<2> 4 20 FB4_2 126 I/O O STD FAST RESET
en<6> 4 20 FB4_3 133 I/O O STD FAST RESET
en<1> 4 20 FB4_9 131 I/O O STD FAST RESET
en<0> 4 20 FB4_11 132 I/O O STD FAST RESET
en<7> 4 20 FB4_12 134 I/O O STD FAST RESET
dataout<7> 25 17 FB6_2 106 I/O O STD FAST
dataout<5> 0 0 FB6_4 111 I/O O STD FAST
dataout<4> 25 17 FB6_8 113 I/O O STD FAST
dataout<2> 3 11 FB6_9 116 I/O O STD FAST
dataout<3> 3 11 FB6_10 115 I/O O STD FAST
dataout<0> 0 0 FB6_11 119 I/O O STD FAST
en<3> 4 20 FB6_12 120 I/O O STD FAST RESET
en<4> 4 20 FB6_15 124 I/O O STD FAST RESET
en<5> 4 20 FB6_17 125 I/O O STD FAST RESET
dataout<6> 0 0 FB8_16 107 I/O O STD FAST
** 19 Buried Nodes **
Signal Total Total Loc Pwr Reg Init
Name Pts Inps Mode State
cnt<0> 2 3 FB1_3 STD RESET
cnt<9> 3 12 FB1_4 STD RESET
cnt<8> 3 11 FB1_5 STD RESET
cnt<7> 3 10 FB1_6 STD RESET
cnt<6> 3 9 FB1_7 STD RESET
cnt<5> 3 8 FB1_8 STD RESET
cnt<4> 3 7 FB1_9 STD RESET
cnt<3> 3 6 FB1_10 STD RESET
cnt<2> 3 5 FB1_11 STD RESET
cnt<1> 3 4 FB1_12 STD RESET
cnt<15> 3 18 FB1_13 STD RESET
cnt<14> 3 17 FB1_14 STD RESET
cnt<13> 3 16 FB1_15 STD RESET
cnt<12> 3 15 FB1_16 STD RESET
cnt<11> 3 14 FB1_17 STD RESET
cnt<10> 3 13 FB1_18 STD RESET
$OpTx$$OpTx$FX_DC$16_INV$175 1 2 FB2_18 STD
$OpTx$DEC_dataout_buf<0>$1 23 15 FB5_16 STD
$OpTx$DEC_dataout_buf<0>$0 23 15 FB7_16 STD
** 10 Inputs **
Signal Loc Pin Pin Pin
Name No. Type Use
clk FB4_5 128 I/O I
datain<4> FB5_3 59 I/O I
datain<1> FB5_7 66 I/O I
datain<7> FB5_8 56 I/O I
datain<6> FB5_9 57 I/O I
datain<5> FB5_11 58 I/O I
datain<3> FB5_14 61 I/O I
datain<2> FB5_15 64 I/O I
datain<0> FB5_17 69 I/O I
rst FB7_2 71 I/O I
Legend:
Pin No. - ~ - User Assigned
************************** Function Block Details ************************
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pin Type/Use - I - Input GCK - Global Clock
O - Output GTS - Global Output Enable
(b) - Buried macrocell GSR - Global Set/Reset
X - Signal used as input to the macrocell logic.
Pin No. - ~ - User Assigned
*********************************** FB1 ***********************************
Number of function block inputs used/remaining: 18/36
Number of signals used by logic mapping into function block: 18
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB1_1 23 I/O
(unused) 0 0 0 5 FB1_2 16 I/O
cnt<0> 2 0 0 3 FB1_3 17 I/O (b)
cnt<9> 3 0 0 2 FB1_4 25 I/O (b)
cnt<8> 3 0 0 2 FB1_5 19 I/O (b)
cnt<7> 3 0 0 2 FB1_6 20 I/O (b)
cnt<6> 3 0 0 2 FB1_7 (b) (b)
cnt<5> 3 0 0 2 FB1_8 21 I/O (b)
cnt<4> 3 0 0 2 FB1_9 22 I/O (b)
cnt<3> 3 0 0 2 FB1_10 31 I/O (b)
cnt<2> 3 0 0 2 FB1_11 24 I/O (b)
cnt<1> 3 0 0 2 FB1_12 26 I/O (b)
cnt<15> 3 0 0 2 FB1_13 (b) (b)
cnt<14> 3 0 0 2 FB1_14 27 I/O (b)
cnt<13> 3 0 0 2 FB1_15 28 I/O (b)
cnt<12> 3 0 0 2 FB1_16 35 I/O (b)
cnt<11> 3 0 0 2 FB1_17 30 GCK/I/O (b)
cnt<10> 3 0 0 2 FB1_18 (b) (b)
Signals Used by Logic in Function Block
1: clk 7: cnt<14> 13: cnt<5>
2: cnt<0> 8: cnt<15> 14: cnt<6>
3: cnt<10> 9: cnt<1> 15: cnt<7>
4: cnt<11> 10: cnt<2> 16: cnt<8>
5: cnt<12> 11: cnt<3> 17: cnt<9>
6: cnt<13> 12: cnt<4> 18: rst
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
cnt<0> XX...............X...................... 3
cnt<9> XX......XXXXXXXXXX...................... 12
cnt<8> XX......XXXXXXXX.X...................... 11
cnt<7> XX......XXXXXXX..X...................... 10
cnt<6> XX......XXXXXX...X...................... 9
cnt<5> XX......XXXXX....X...................... 8
cnt<4> XX......XXXX.....X...................... 7
cnt<3> XX......XXX......X...................... 6
cnt<2> XX......XX.......X...................... 5
cnt<1> XX......X........X...................... 4
cnt<15> XXXXXXXXXXXXXXXXXX...................... 18
cnt<14> XXXXXXX.XXXXXXXXXX...................... 17
cnt<13> XXXXXX..XXXXXXXXXX...................... 16
cnt<12> XXXXX...XXXXXXXXXX...................... 15
cnt<11> XXXX....XXXXXXXXXX...................... 14
cnt<10> XXX.....XXXXXXXXXX...................... 13
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB2 ***********************************
Number of function block inputs used/remaining: 2/52
Number of signals used by logic mapping into function block: 2
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB2_1 142 I/O
(unused) 0 0 0 5 FB2_2 143 GSR/I/O
(unused) 0 0 0 5 FB2_3 (b)
(unused) 0 0 0 5 FB2_4 4 I/O
(unused) 0 0 0 5 FB2_5 2 GTS/I/O
(unused) 0 0 0 5 FB2_6 3 GTS/I/O
(unused) 0 0 0 5 FB2_7 (b)
(unused) 0 0 0 5 FB2_8 5 GTS/I/O
(unused) 0 0 0 5 FB2_9 6 GTS/I/O
(unused) 0 0 0 5 FB2_10 7 I/O
(unused) 0 0 0 5 FB2_11 9 I/O
(unused) 0 0 0 5 FB2_12 10 I/O
(unused) 0 0 0 5 FB2_13 12 I/O
(unused) 0 0 0 5 FB2_14 11 I/O
(unused) 0 0 0 5 FB2_15 13 I/O
(unused) 0 0 0 5 FB2_16 14 I/O
(unused) 0 0 0 5 FB2_17 15 I/O
$OpTx$$OpTx$FX_DC$16_INV$175
1 0 0 4 FB2_18 (b) (b)
Signals Used by Logic in Function Block
1: en<3> 2: en<5>
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
$OpTx$$OpTx$FX_DC$16_INV$175
XX...................................... 2
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB3 ***********************************
Number of function block inputs used/remaining: 0/54
Number of signals used by logic mapping into function block: 0
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB3_1 39 I/O
(unused) 0 0 0 5 FB3_2 32 GCK/I/O
(unused) 0 0 0 5 FB3_3 41 I/O
(unused) 0 0 0 5 FB3_4 44 I/O
(unused) 0 0 0 5 FB3_5 33 I/O
(unused) 0 0 0 5 FB3_6 34 I/O
(unused) 0 0 0 5 FB3_7 46 I/O
(unused) 0 0 0 5 FB3_8 38 GCK/I/O
(unused) 0 0 0 5 FB3_9 40 I/O
(unused) 0 0 0 5 FB3_10 48 I/O
(unused) 0 0 0 5 FB3_11 43 I/O
(unused) 0 0 0 5 FB3_12 45 I/O
(unused) 0 0 0 5 FB3_13 (b)
(unused) 0 0 0 5 FB3_14 49 I/O
(unused) 0 0 0 5 FB3_15 50 I/O
(unused) 0 0 0 5 FB3_16 (b)
(unused) 0 0 0 5 FB3_17 51 I/O
(unused) 0 0 0 5 FB3_18 (b)
*********************************** FB4 ***********************************
Number of function block inputs used/remaining: 24/30
Number of signals used by logic mapping into function block: 24
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
dataout<1> 0 0 0 5 FB4_1 118 I/O O
en<2> 4 0 0 1 FB4_2 126 I/O O
en<6> 4 0 0 1 FB4_3 133 I/O O
(unused) 0 0 0 5 FB4_4 (b)
(unused) 0 0 0 5 FB4_5 128 I/O I
(unused) 0 0 0 5 FB4_6 129 I/O
(unused) 0 0 0 5 FB4_7 (b)
(unused) 0 0 0 5 FB4_8 130 I/O
en<1> 4 0 0 1 FB4_9 131 I/O O
(unused) 0 0 0 5 FB4_10 135 I/O
en<0> 4 0 0 1 FB4_11 132 I/O O
en<7> 4 0 0 1 FB4_12 134 I/O O
(unused) 0 0 0 5 FB4_13 137 I/O
(unused) 0 0 0 5 FB4_14 136 I/O
(unused) 0 0 0 5 FB4_15 138 I/O
(unused) 0 0 0 5 FB4_16 139 I/O
(unused) 0 0 0 5 FB4_17 140 I/O
(unused) 0 0 0 5 FB4_18 (b)
Signals Used by Logic in Function Block
1: clk 9: cnt<1> 17: cnt<9>
2: cnt<0> 10: cnt<2> 18: en<0>
3: cnt<10> 11: cnt<3> 19: en<1>
4: cnt<11> 12: cnt<4> 20: en<2>
5: cnt<12> 13: cnt<5> 21: en<5>
6: cnt<13> 14: cnt<6> 22: en<6>
7: cnt<14> 15: cnt<7> 23: en<7>
8: cnt<15> 16: cnt<8> 24: rst
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