ledwater.cmd_log

Mars-XC2S50-S-Core-V2.0开发板核心板的说明和设计文档

xst -intstyle ise -ifn __projnav/ledwater.xst -ofn ledwater.syr
ngdbuild -dd _ngo -uc ledwater.ucf -p xc9500 ledwater.ngc ledwater.ngd
cpldfit -p xc95108-15-PC84 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 36 -pterms 25 -power std -localfbk -pinfbk ledwater.ngd
hprep6 -s IEEE1149 -n ledwater -i ledwater
taengine -f ledwater -w --format html1 -l e:\cindy\developboard\xc95108\ledwater/ledwater_html/tim/timing_report.htm
XSLTProcess "ledwater_build.xml"
xst -intstyle ise -ifn __projnav/ledwater.xst -ofn ledwater.syr
ngdbuild -dd _ngo -uc ledwater.ucf -p xc9500 ledwater.ngc ledwater.ngd
cpldfit -p xc95108-15-PC84 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 36 -pterms 25 -power std -localfbk -pinfbk ledwater.ngd
hprep6 -s IEEE1149 -n ledwater -i ledwater
taengine -f ledwater -w --format html1 -l e:\cindy\developboard\xc95108\ledwater/ledwater_html/tim/timing_report.htm
XSLTProcess "ledwater_build.xml"
xst -intstyle ise -ifn __projnav/ledwater.xst -ofn ledwater.syr
ngdbuild -dd _ngo -uc ledwater.ucf -p xc9500xl ledwater.ngc ledwater.ngd
cpldfit -p xc95144xl-10-TQ144 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper ledwater.ngd
XSLTProcess "ledwater_build.xml"
xst -intstyle ise -ifn __projnav/ledwater.xst -ofn ledwater.syr
ngdbuild -dd _ngo -uc ledwater.ucf -p xc9500xl ledwater.ngc ledwater.ngd
cpldfit -p xc95144xl-10-TQ144 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper ledwater.ngd
hprep6 -s IEEE1149 -n ledwater -i ledwater
taengine -f ledwater -w --format html1 -l e:\temp\95144\veriloge\basic\ledwater/ledwater_html/tim/timing_report.htm
XSLTProcess "ledwater_build.xml"
xst -intstyle ise -ifn __projnav/ledwater.xst -ofn ledwater.syr
ngdbuild -intstyle ise -dd "e:\temp\spartan2\veriloge\interface\ledwater/_ngo" -nt timestamp -uc ledwater.ucf  -p xc2s50-TQ144-6 ledwater.ngc ledwater.ngd
map -intstyle ise -p xc2s50-TQ144-6 -cm area -pr b -k 4 -c 100 -tx off -o ledwater_map.ncd ledwater.ngd ledwater.pcf
par -w -intstyle ise -ol std -t 1 ledwater_map.ncd ledwater.ncd ledwater.pcf
trce -intstyle ise -e 3 -l 3 -s 6 -xml ledwater ledwater.ncd -o ledwater.twr ledwater.pcf
bitgen -intstyle ise -f ledwater.ut ledwater.ncd
xst -intstyle ise -ifn __projnav/ledwater.xst -ofn ledwater.syr
ngdbuild -intstyle ise -dd "e:\temp\spartan2\veriloge\interface\ledwater/_ngo" -uc ledwater.ucf  -p xc2s50-tq144-6 ledwater.ngc ledwater.ngd
map -intstyle ise -p xc2s50-tq144-6 -cm area -pr b -k 4 -c 100 -tx off -o ledwater_map.ncd ledwater.ngd ledwater.pcf
par -w -intstyle ise -ol std -t 1 ledwater_map.ncd ledwater.ncd ledwater.pcf
trce -intstyle ise -e 3 -l 3 -s 6 -xml ledwater ledwater.ncd -o ledwater.twr ledwater.pcf
bitgen -intstyle ise -f ledwater.ut ledwater.ncd