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📁 Mars-XC2S50-S-Core-V2.0开发板核心板的说明和设计文档
💻 VM6
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INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<3> | 16558 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<3>.Q | clk_div<3> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<4> | 16559 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<4>.Q | clk_div<4> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<5> | 16560 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<5>.Q | clk_div<5> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<6> | 16561 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<6>.Q | clk_div<6> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<7> | 16562 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<7>.Q | clk_div<7> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_IBUF | 16490 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | clk_IBUF | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | phase1 | 16500 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | phase1.Q | phase1 | 1 | 0 | MC_UIM

SIGNAL_INSTANCE | phase1.SI | phase1 | 0 | 11 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rst_IBUF | 16488 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | rst_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | phase1 | 16500 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | phase1.Q | phase1 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<0> | 16554 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<0>.Q | clk_div<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<1> | 16556 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<1>.Q | clk_div<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<2> | 16557 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<2>.Q | clk_div<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<3> | 16558 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<3>.Q | clk_div<3> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<4> | 16559 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<4>.Q | clk_div<4> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<5> | 16560 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<5>.Q | clk_div<5> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<6> | 16561 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<6>.Q | clk_div<6> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_div<7> | 16562 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | clk_div<7>.Q | clk_div<7> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_IBUF | 16490 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | clk_IBUF | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | phase1.D1 | 16639 | ? | 0 | 4096 | phase1 | NULL | NULL | phase1.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | phase1.D2 | 16640 | ? | 0 | 4096 | phase1 | NULL | NULL | phase1.SI | 2 | 9 | MC_SI_D2
SPPTERM | 10 | IV_TRUE | rst_IBUF | IV_FALSE | phase1 | IV_FALSE | clk_div<0> | IV_FALSE | clk_div<1> | IV_FALSE | clk_div<2> | IV_TRUE | clk_div<3> | IV_TRUE | clk_div<4> | IV_FALSE | clk_div<5> | IV_FALSE | clk_div<6> | IV_FALSE | clk_div<7>
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | phase1.CLKF | 16641 | ? | 0 | 4096 | phase1 | NULL | NULL | phase1.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | clk_IBUF

SRFF_INSTANCE | phase1.REG | phase1 | 0 | 2 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | phase1.D | 16638 | ? | 0 | 0 | phase1 | NULL | NULL | phase1.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | phase1.CLKF | 16641 | ? | 0 | 4096 | phase1 | NULL | NULL | phase1.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | clk_IBUF
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | phase1.Q | 16642 | ? | 0 | 0 | phase1 | NULL | NULL | phase1.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | cnt_delay<0> | i2c_COPY_0_COPY_0 | 2155877632 | 23 | 1
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<0> | 16501 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<0>.Q | cnt_delay<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<10> | 16502 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<10>.Q | cnt_delay<10> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<12> | 16503 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<12>.Q | cnt_delay<12> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<13> | 16504 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<13>.Q | cnt_delay<13> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<18> | 16505 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<18>.Q | cnt_delay<18> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<8> | 16506 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<8>.Q | cnt_delay<8> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<11> | 16508 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<11>.Q | cnt_delay<11> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<14> | 16509 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<14>.Q | cnt_delay<14> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<15> | 16510 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<15>.Q | cnt_delay<15> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<16> | 16511 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<16>.Q | cnt_delay<16> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<17> | 16512 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<17>.Q | cnt_delay<17> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<19> | 16513 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<19>.Q | cnt_delay<19> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<1> | 16514 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<1>.Q | cnt_delay<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<2> | 16515 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<2>.Q | cnt_delay<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<3> | 16516 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<3>.Q | cnt_delay<3> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<4> | 16517 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<4>.Q | cnt_delay<4> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<5> | 16518 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<5>.Q | cnt_delay<5> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<6> | 16519 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<6>.Q | cnt_delay<6> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<7> | 16520 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<7>.Q | cnt_delay<7> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<9> | 16521 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<9>.Q | cnt_delay<9> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rst_IBUF | 16488 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | rst_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | start_delaycnt | 16531 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | start_delaycnt.Q | start_delaycnt | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_IBUF | 16490 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | clk_IBUF | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | cnt_delay<0> | 16501 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<0>.Q | cnt_delay<0> | 1 | 0 | MC_UIM

SIGNAL_INSTANCE | cnt_delay<0>.SI | cnt_delay<0> | 0 | 23 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<0> | 16501 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<0>.Q | cnt_delay<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<10> | 16502 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<10>.Q | cnt_delay<10> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<12> | 16503 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<12>.Q | cnt_delay<12> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<13> | 16504 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<13>.Q | cnt_delay<13> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<18> | 16505 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<18>.Q | cnt_delay<18> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<8> | 16506 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<8>.Q | cnt_delay<8> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<11> | 16508 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<11>.Q | cnt_delay<11> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<14> | 16509 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<14>.Q | cnt_delay<14> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<15> | 16510 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<15>.Q | cnt_delay<15> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<16> | 16511 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<16>.Q | cnt_delay<16> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<17> | 16512 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<17>.Q | cnt_delay<17> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<19> | 16513 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<19>.Q | cnt_delay<19> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<1> | 16514 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<1>.Q | cnt_delay<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<2> | 16515 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<2>.Q | cnt_delay<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<3> | 16516 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<3>.Q | cnt_delay<3> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<4> | 16517 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<4>.Q | cnt_delay<4> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<5> | 16518 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<5>.Q | cnt_delay<5> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<6> | 16519 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<6>.Q | cnt_delay<6> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<7> | 16520 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<7>.Q | cnt_delay<7> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt_delay<9> | 16521 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | cnt_delay<9>.Q | cnt_delay<9> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rst_IBUF | 16488 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | rst_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | start_delaycnt | 16531 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | start_delaycnt.Q | start_delaycnt | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clk_IBUF | 16490 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | clk_IBUF | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | cnt_delay<0>.D1 | 16644 | ? | 0 | 4096 | cnt_delay<0> | NULL | NULL | cnt_delay<0>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | cnt_delay<0>.D2 | 16645 | ? | 0 | 4096 | cnt_delay<0> | NULL | NULL | cnt_delay<0>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 2 | IV_TRUE | rst_IBUF | IV_FALSE | start_delaycnt
SPPTERM | 2 | IV_FALSE | rst_IBUF | IV_FALSE | cnt_delay<0>
SPPTERM | 20 | IV_FALSE | cnt_delay<0> | IV_TRUE | cnt_delay<10> | IV_TRUE | cnt_delay<12> | IV_TRUE | cnt_delay<13> | IV_TRUE | cnt_delay<18> | IV_TRUE | cnt_delay<8> | IV_FALSE | cnt_delay<11> | IV_FALSE | cnt_delay<14> | IV_FALSE | cnt_delay<15> | IV_FALSE | cnt_delay<16> | IV_FALSE | cnt_delay<17> | IV_TRUE | cnt_delay<19> | IV_FALSE | cnt_delay<1> | IV_FALSE | cnt_delay<2> | IV_FALSE | cnt_delay<3> | IV_FALSE | cnt_delay<4> | IV_FALSE | cnt_delay<5> | IV_FALSE | cnt_delay<6> | IV_FALSE | cnt_delay<7> | IV_FALSE | cnt_delay<9>
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | cnt_delay<0>.CLKF | 16646 | ? | 0 | 4096 | cnt_delay<0> | NULL | NULL | cnt_delay<0>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | clk_IBUF

SRFF_INSTANCE | cnt_delay<0>.REG | cnt_delay<0> | 0 | 2 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | cnt_delay<0>.D | 16643 | ? | 0 | 0 | cnt_delay<0> | NULL | NULL | cnt_delay<0>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | cnt_delay<0>.CLKF | 16646 | ? | 0 | 4096 | cnt_delay<0> | NULL | NULL | cnt_delay<0>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | clk_IBUF
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | cnt_delay<0>.Q | 16647 | ? | 0 | 0 | cnt_delay<0> | NULL | NULL | cnt_delay<0>.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt_delay<10> | i2c_COPY_0_COPY_0 | 2155877376 | 23 | 1
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rst_IBUF | 16488 | ? | 0 | 0 | i2c_COPY_0_COPY_0 | NULL | NULL | rst_IBUF | 0 | 5 | II_IMUX
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