📄 vga_vl.bld

📁 Mars-XC2S50-S-Core-V2.0开发板核心板的说明和设计文档

💻 BLD

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Release 7.1i ngdbuild H.38Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.Command Line: ngdbuild -intstyle ise -dd
e:\temp\spartan2\veriloge\interface\vga/_ngo -uc vga_vl.ucf -p xc2s50-tq144-6
vga_vl.ngc vga_vl.ngd Reading NGO file 'E:/temp/SPARTAN2/veriloge/interface/VGA/vga_vl.ngc' ...Applying constraints in "vga_vl.ucf" to the design...Checking timing specifications ...Checking expanded design ...NGDBUILD Design Results Summary:  Number of errors:     0  Number of warnings:   0Total memory usage is 52684 kilobytesWriting NGD file "vga_vl.ngd" ...Writing NGDBUILD log file "vga_vl.bld"...

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