lcd12864.gfl

Mars-XC2S50-S-Core-V2.0开发板核心板的说明和设计文档

# Assign Package Pins (Design Module)
if
 $IsCopy 

            Xilinx::Dpm::dpm_flowUtilsFilesToDelete "DID_File"  "$HDLModule"
         
# XST (Creating Lso File) : 
lcd0.lso
# xst flow : RunXST
lcd0.syr
lcd0.prj
lcd0.sprj
lcd0.ana
lcd0.stx
lcd0.cmd_log
lcd0.ngc
lcd0.ngr
# Implmentation : Translate (CPLD flow)
__projnav/lcd0_edfTOngd_tcl.rsp
lcd0.ngd
lcd0.bld
lcd0_ngdbuild.nav
_ngo/netlist.lst
lcd0.ucf.untf
lcd0_html
lcd0.cmd_log
# Implmentation : Fit
__projnav/lcd0_ngdTOvm6_tcl.rsp
lcd0.vm6
lcd0.cxt
lcd0.blx
lcd0.mfd
lcd0.rpt
lcd0.log
lcd0.pnx
lcd0.gyd
lcd0.xml
lcd0_build.xml
lcd12864.ptf
lcd0.bl
errors.xml
tmperr.err
lcd0.cmd_log
# Generate Programming File (CPLD flow)
__projnav/lcd0_vm6TOjed_tcl.rsp
lcd0.jed
lcd0.isc
lcd0.cmd_log
# Implmentation : Generate Timing
__projnav/lcd0_vm6TOtim_tcl.rsp
lcd0.tim
lcd0.mod
lcd0.data
lcd0.cmd_log
e:\temp\95144\veriloge\lcd12864/lcd0_html
__projnav\taengine.err
# Implmentation : FitRpt
lcd0_html
lcd0._hrpt
lcd0.cmd_log
# Implmentation : FitRpt
lcd0.imp
# Configure Device (iMPACT)
lcd0.prm
lcd0.isc
lcd0.svf
xilinx.sys
lcd0.mcs
lcd0.exo
lcd0.hex
lcd0.tek
lcd0.dst
lcd0.dst_compressed
lcd0.mpm
_impact.cmd
_impact.log
# XST (Creating Lso File) : 
lcd0.lso
# xst flow : RunXST
lcd0_summary.html
# xst flow : RunXST
lcd0.syr
lcd0.prj
lcd0.sprj
lcd0.ana
lcd0.stx
lcd0.cmd_log
lcd0.ngc
lcd0.ngr
# Implmentation : Translate
__projnav/ednTOngd_tcl.rsp
"e:\temp\spartan2\veriloge\interface\lcd12864/_ngo"
lcd0.ngd
lcd0_ngdbuild.nav
lcd0.bld
lcd0.ucf.untf
lcd0.cmd_log
# Implementation : Map
lcd0_summary.html
# Implementation : Map
lcd0_map.ncd
lcd0.ngm
lcd0.pcf
lcd0.nc1
lcd0.mrp
lcd0_map.mrp
lcd0.mdf
lcd0.cmd_log
MAP_NO_GUIDE_FILE_CPF "lcd0"
lcd0_map.ngm
# XST (Creating Lso File) : 
lcd0.lso
# xst flow : RunXST
lcd0_summary.html
# xst flow : RunXST
lcd0.syr
lcd0.prj
lcd0.sprj
lcd0.ana
lcd0.stx
lcd0.cmd_log
lcd0.ngc
lcd0.ngr
# Implmentation : Translate
__projnav/ednTOngd_tcl.rsp
"e:\temp\spartan2\veriloge\interface\lcd12864/_ngo"
lcd0.ngd
lcd0_ngdbuild.nav
lcd0.bld
lcd0.ucf.untf
lcd0.cmd_log
# Implementation : Map
lcd0_summary.html
# Implementation : Map
lcd0_map.ncd
lcd0.ngm
lcd0.pcf
lcd0.nc1
lcd0.mrp
lcd0_map.mrp
lcd0.mdf
lcd0.cmd_log
MAP_NO_GUIDE_FILE_CPF "lcd0"
lcd0_map.ngm
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
lcd0.twr
lcd0.twx
lcd0.tsi
lcd0.cmd_log
# Implementation : Place & Route
lcd0_summary.html
# Implmentation : Place & Route
__projnav/nc1TOncd_tcl.rsp
lcd0.ncd
lcd0.par
lcd0.pad
lcd0_pad.txt
lcd0_pad.csv
lcd0.pad_txt
lcd0.dly
reportgen.log
lcd0.xpi
lcd0.grf
lcd0.itr
lcd0_last_par.ncd
lcd0.placed_ncd_tracker
lcd0.routed_ncd_tracker
lcd0.cmd_log
PAR_NO_GUIDE_FILE_CPF "lcd0"
# Generate Programming File
__projnav/lcd0_ncdTOut_tcl.rsp
__projnav/bitgen.rsp
bitgen.ut
lcd0.ut
# Generate Programming File
lcd0.bgn
lcd0.rbt
lcd0.ll
lcd0.msk
lcd0.drc
lcd0.nky
lcd0.bit
lcd0.bin
lcd0.isc
lcd0.cmd_log
# Configure Device (iMPACT)
lcd0.prm
lcd0.isc
lcd0.svf
xilinx.sys
lcd0.mcs
lcd0.exo
lcd0.hex
lcd0.tek
lcd0.dst
lcd0.dst_compressed
lcd0.mpm
_impact.cmd
_impact.log
# xst flow : RunXST
lcd0_summary.html
# xst flow : RunXST
lcd0_summary.html
# XST (Creating Lso File) : 
lcd0.lso
# xst flow : RunXST
lcd0_summary.html
# xst flow : RunXST
lcd0.syr
lcd0.prj
lcd0.sprj
lcd0.ana
lcd0.stx
lcd0.cmd_log
lcd0.ngc
lcd0.ngr
# Implmentation : Translate
__projnav/ednTOngd_tcl.rsp
"e:\temp\spartan2\veriloge\interface\lcd12864/_ngo"
lcd0.ngd
lcd0_ngdbuild.nav
lcd0.bld
lcd0.ucf.untf
lcd0.cmd_log
# Implementation : Map
lcd0_summary.html
# Implementation : Map
lcd0_map.ncd
lcd0.ngm
lcd0.pcf
lcd0.nc1
lcd0.mrp
lcd0_map.mrp
lcd0.mdf
lcd0.cmd_log
MAP_NO_GUIDE_FILE_CPF "lcd0"
lcd0_map.ngm
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
lcd0.twr
lcd0.twx
lcd0.tsi
lcd0.cmd_log
# Implementation : Place & Route
lcd0_summary.html
# Implmentation : Place & Route
__projnav/nc1TOncd_tcl.rsp
lcd0.ncd
lcd0.par
lcd0.pad
lcd0_pad.txt
lcd0_pad.csv
lcd0.pad_txt
lcd0.dly
reportgen.log
lcd0.xpi
lcd0.grf
lcd0.itr
lcd0_last_par.ncd
lcd0.placed_ncd_tracker
lcd0.routed_ncd_tracker
lcd0.cmd_log
PAR_NO_GUIDE_FILE_CPF "lcd0"
# Generate Programming File
__projnav/lcd0_ncdTOut_tcl.rsp
__projnav/bitgen.rsp
bitgen.ut
lcd0.ut
# Generate Programming File
lcd0.bgn
lcd0.rbt
lcd0.ll
lcd0.msk
lcd0.drc
lcd0.nky
lcd0.bit
lcd0.bin
lcd0.isc
lcd0.cmd_log
# Configure Device (iMPACT)
lcd0.prm
lcd0.isc
lcd0.svf
xilinx.sys
lcd0.mcs
lcd0.exo
lcd0.hex
lcd0.tek
lcd0.dst
lcd0.dst_compressed
lcd0.mpm
_impact.cmd
_impact.log
# xst flow : RunXST
lcd0_summary.html
# xst flow : RunXST
lcd0_summary.html
# Implmentation : Translate
__projnav/ednTOngd_tcl.rsp
"e:\temp\spartan2\veriloge\interface\lcd12864/_ngo"
lcd0.ngd
lcd0_ngdbuild.nav
lcd0.bld
lcd0.ucf.untf
lcd0.cmd_log
# Implementation : Map
lcd0_summary.html
# Implementation : Map
lcd0_map.ncd
lcd0.ngm
lcd0.pcf
lcd0.nc1
lcd0.mrp
lcd0_map.mrp
lcd0.mdf
lcd0.cmd_log
MAP_NO_GUIDE_FILE_CPF "lcd0"
lcd0_map.ngm
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
lcd0.twr
lcd0.twx
lcd0.tsi
lcd0.cmd_log
# Implementation : Place & Route
lcd0_summary.html
# Implmentation : Place & Route
__projnav/nc1TOncd_tcl.rsp
lcd0.ncd
lcd0.par
lcd0.pad
lcd0_pad.txt
lcd0_pad.csv
lcd0.pad_txt
lcd0.dly
reportgen.log
lcd0.xpi
lcd0.grf
lcd0.itr
lcd0_last_par.ncd
lcd0.placed_ncd_tracker
lcd0.routed_ncd_tracker
lcd0.cmd_log
PAR_NO_GUIDE_FILE_CPF "lcd0"
# Generate Programming File
__projnav/lcd0_ncdTOut_tcl.rsp
__projnav/bitgen.rsp
bitgen.ut
lcd0.ut
# Generate Programming File
lcd0.bgn
lcd0.rbt
lcd0.ll
lcd0.msk
lcd0.drc
lcd0.nky
lcd0.bit
lcd0.bin
lcd0.isc
lcd0.cmd_log