📄 lcd1602.rpt
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|| (XLXI_2/state_FFd2 && !XLXI_2/state_FFd3)
|| (XLXI_2/address[4] && XLXI_2/state_FFd1 &&
XLXI_2/state_FFd2)
|| (XLXI_2/address[5] && XLXI_2/state_FFd1 &&
XLXI_2/state_FFd2));
FDCPE FDCPE_XLXI_2/state_FFd2 (XLXI_2/state_FFd2,XLXI_2/state_FFd2_D,XLXI_2/clk_int,!rst,1'b0);
assign XLXI_2/state_FFd2_D = ((!XLXI_2/state_FFd1 && XLXI_2/state_FFd3)
|| (!XLXI_2/state_FFd1 && !XLXI_2/state_FFd2 &&
!XLXI_2/flag));
FTCPE FTCPE_XLXI_2/state_FFd3 (XLXI_2/state_FFd3,XLXI_2/state_FFd3_T,XLXI_2/clk_int,!rst,1'b0);
assign XLXI_2/state_FFd3_T = ((XLXI_2/state_FFd1 && XLXI_2/state_FFd2)
|| (!XLXI_2/state_FFd1 && !XLXI_2/state_FFd2 &&
XLXI_2/state_FFd3));
FTCPE FTCPE_XLXN_1 (XLXN_1,XLXN_1_T,clk,!rst,1'b0);
assign XLXN_1_T = (XLXI_1/count[0] && XLXI_1/count[1] &&
XLXI_1/count[2]);
FTCPE FTCPE_data0 (data_I[0],data_T[0],XLXI_2/clk_int,1'b0,1'b0);
assign data_T[0] = ((EXP15_.EXP)
|| (EXP16_.EXP)
|| (data[0] && rst && !XLXI_2/state_FFd1 &&
XLXI_2/state_FFd2)
|| (data[0] && rst && !XLXI_2/state_FFd2 &&
XLXI_2/state_FFd3)
|| (!data[0] && rst && XLXI_2/state_FFd1 &&
!XLXI_2/state_FFd3));
assign data[0] = data_OE[0] ? data_I[0] : 1'bZ;
assign data_OE[0] = !XLXI_2/Mtrien_data[0];
FDCPE FDCPE_data1 (data_I[1],data[1],XLXI_2/clk_int,1'b0,1'b0);
assign data[1] = ((EXP22_.EXP)
|| (data[1] && !rst)
|| (data[1] && !XLXI_2/state_FFd1 && !XLXI_2/state_FFd3)
|| (rst && !XLXI_2/state_FFd1 && XLXI_2/state_FFd2 &&
!XLXI_2/state_FFd3));
assign data[1] = data_OE[1] ? data_I[1] : 1'bZ;
assign data_OE[1] = !XLXI_2/Mtrien_data[1];
FTCPE FTCPE_data2 (data_I[2],data_T[2],XLXI_2/clk_int,1'b0,1'b0);
assign data_T[2] = ((EXP17_.EXP)
|| (data[2] && rst && XLXI_2/state_FFd1 &&
!XLXI_2/state_FFd3)
|| (!data[2] && rst && !XLXI_2/state_FFd2 &&
XLXI_2/state_FFd3)
|| (data[2] && rst && !XLXI_2/state_FFd1 &&
XLXI_2/state_FFd2 && XLXI_2/state_FFd3));
assign data[2] = data_OE[2] ? data_I[2] : 1'bZ;
assign data_OE[2] = !XLXI_2/Mtrien_data[2];
FTCPE FTCPE_data3 (data_I[3],data_T[3],XLXI_2/clk_int,1'b0,1'b0);
assign data_T[3] = ((EXP18_.EXP)
|| (_10_.EXP)
|| (data[3] && rst && XLXI_2/state_FFd1 &&
!XLXI_2/state_FFd3)
|| (data[3] && rst && !XLXI_2/state_FFd1 &&
XLXI_2/state_FFd2)
|| (!data[3] && rst && !XLXI_2/state_FFd2 &&
XLXI_2/state_FFd3));
assign data[3] = data_OE[3] ? data_I[3] : 1'bZ;
assign data_OE[3] = !XLXI_2/Mtrien_data[3];
FTCPE FTCPE_data4 (data_I[4],data_T[4],XLXI_2/clk_int,1'b0,1'b0);
assign data_T[4] = ((XLXI_2/Mtrien_data[7].EXP)
|| (data[4] && rst && XLXI_2/state_FFd1 &&
!XLXI_2/state_FFd2)
|| (data[4] && rst && XLXI_2/state_FFd2 &&
!XLXI_2/state_FFd3)
|| (!data[4] && rst && !XLXI_2/state_FFd1 &&
XLXI_2/state_FFd3));
assign data[4] = data_OE[4] ? data_I[4] : 1'bZ;
assign data_OE[4] = !XLXI_2/Mtrien_data[4];
assign data_I[5] = data[5]_BUFR;
assign data[5] = data_OE[5] ? data_I[5] : 1'bZ;
assign data_OE[5] = !XLXI_2/Mtrien_data[5];
FDCPE FDCPE_data5_BUFR (data[5]_BUFR,data_D[5]_BUFR,XLXI_2/clk_int,1'b0,1'b0);
assign data_D[5]_BUFR = ((EXP23_.EXP)
|| (data[5] && !rst)
|| (data[5] && !XLXI_2/state_FFd1 && !XLXI_2/state_FFd2)
|| (rst && !XLXI_2/state_FFd1 && !XLXI_2/state_FFd2 &&
XLXI_2/state_FFd3)
|| (data[5] && XLXI_2/address[4] && XLXI_2/state_FFd1 &&
XLXI_2/state_FFd2 && XLXI_2/state_FFd3));
FDCPE FDCPE_data6 (data_I[6],data[6],XLXI_2/clk_int,1'b0,1'b0);
assign data[6] = ((XLXI_2/lcd_e.EXP)
|| (EXP14_.EXP)
|| (data[6] && !rst)
|| (data[6] && !XLXI_2/state_FFd1 && !XLXI_2/state_FFd2 &&
!XLXI_2/state_FFd3)
|| (data[6] && XLXI_2/address[4] && XLXI_2/state_FFd1 &&
XLXI_2/state_FFd2 && XLXI_2/state_FFd3));
assign data[6] = data_OE[6] ? data_I[6] : 1'bZ;
assign data_OE[6] = !XLXI_2/Mtrien_data[6];
FDCPE FDCPE_data7 (data_I[7],data[7],XLXI_2/clk_int,1'b0,1'b0);
assign data[7] = ((EXP19_.EXP)
|| (data[7] && !rst));
assign data[7] = data_OE[7] ? data_I[7] : 1'bZ;
assign data_OE[7] = !data[7];
FDCPE FDCPE_lcd_e (lcd_e,lcd_e_D,!XLXI_2/clkdiv,1'b0,1'b0);
assign lcd_e_D = (rst && !lcd_e);
FDCPE FDCPE_lcd_rs (lcd_rs,lcd_rs_D,XLXI_2/clk_int,1'b0,1'b0,rst);
assign lcd_rs_D = ((EXP12_.EXP)
|| (lcd_rs && !XLXI_2/state_FFd1 && !XLXI_2/state_FFd2 &&
!XLXI_2/state_FFd3)
|| (!XLXI_2/address[2] && !XLXI_2/address[4] &&
!XLXI_2/address[5] && XLXI_2/state_FFd1 && XLXI_2/state_FFd2 &&
XLXI_2/state_FFd3));
assign lcd_rw = 1'b0;
Register Legend:
FDCPE (Q,D,C,CLR,PRE,CE);
FTCPE (Q,D,C,CLR,PRE,CE);
LDCP (Q,D,G,CLR,PRE);
****************************** Device Pin Out *****************************
Device : XC95144XL-10-TQ144
Pin Signal Pin Signal
No. Name No. Name
1 VCC 73 VCC
2 KPR 74 KPR
3 KPR 75 KPR
4 KPR 76 KPR
5 KPR 77 KPR
6 KPR 78 KPR
7 KPR 79 KPR
8 VCC 80 KPR
9 KPR 81 KPR
10 KPR 82 KPR
11 KPR 83 KPR
12 KPR 84 VCC
13 KPR 85 KPR
14 KPR 86 KPR
15 KPR 87 KPR
16 KPR 88 KPR
17 KPR 89 GND
18 GND 90 GND
19 KPR 91 KPR
20 KPR 92 KPR
21 KPR 93 KPR
22 KPR 94 KPR
23 KPR 95 KPR
24 KPR 96 KPR
25 KPR 97 KPR
26 KPR 98 KPR
27 KPR 99 GND
28 KPR 100 KPR
29 GND 101 KPR
30 KPR 102 KPR
31 KPR 103 KPR
32 KPR 104 KPR
33 KPR 105 KPR
34 KPR 106 data<0>
35 KPR 107 data<1>
36 GND 108 GND
37 VCC 109 VCC
38 KPR 110 KPR
39 KPR 111 data<2>
40 KPR 112 KPR
41 KPR 113 data<3>
42 VCC 114 GND
43 KPR 115 data<4>
44 KPR 116 data<5>
45 KPR 117 KPR
46 KPR 118 data<6>
47 GND 119 data<7>
48 KPR 120 KPR
49 KPR 121 KPR
50 KPR 122 TDO
51 KPR 123 GND
52 KPR 124 KPR
53 KPR 125 KPR
54 KPR 126 lcd_e
55 VCC 127 VCC
56 KPR 128 clk
57 KPR 129 KPR
58 KPR 130 KPR
59 KPR 131 lcd_rw
60 KPR 132 lcd_rs
61 KPR 133 KPR
62 GND 134 KPR
63 TDI 135 KPR
64 KPR 136 KPR
65 TMS 137 KPR
66 KPR 138 KPR
67 TCK 139 KPR
68 KPR 140 KPR
69 KPR 141 VCC
70 KPR 142 KPR
71 rst 143 KPR
72 GND 144 GND
Legend : NC = Not Connected, unbonded pin
PGND = Unused I/O configured as additional Ground pin
TIE = Unused I/O floating -- must tie to VCC, GND or other signal
KPR = Unused I/O with weak keeper (leave unconnected)
VCC = Dedicated Power Pin
GND = Dedicated Ground Pin
TDI = Test Data In, JTAG pin
TDO = Test Data Out, JTAG pin
TCK = Test Clock, JTAG pin
TMS = Test Mode Select, JTAG pin
PROHIBITED = User reserved pin
**************************** Compiler Options ****************************
Following is a list of all global compiler options used by the fitter run.
Device(s) Specified : xc95144xl-10-TQ144
Optimization Method : SPEED
Multi-Level Logic Optimization : ON
Ignore Timing Specifications : OFF
Default Register Power Up Value : LOW
Keep User Location Constraints : ON
What-You-See-Is-What-You-Get : OFF
Exhaustive Fitting : OFF
Keep Unused Inputs : OFF
Slew Rate : FAST
Power Mode : STD
Ground on Unused IOs : OFF
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