📄 lcd1602.drc

📁 Mars-XC2S50-S-Core-V2.0开发板核心板的说明和设计文档

💻 DRC

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WARNING:PhysDesignRules:372 - Gated clock. Clock net N32 is sourced by a
   combinatorial pin. This is not good design practice. Use the CE pin to
   control the loading of data into the flip-flop.WARNING:PhysDesignRules:372 - Gated clock. Clock net XLXI_2/tc_clkcnt is sourced
   by a combinatorial pin. This is not good design practice. Use the CE pin to
   control the loading of data into the flip-flop.DRC detected 0 errors and 2 warnings.

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