📄 ps2.cmd_log
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sch2verilog -intstyle ise -family spartan3 -w ps2.sch ps2.vf
xst -intstyle ise -ifn __projnav/ps2.xst -ofn ps2.syr
ngdbuild -intstyle ise -dd "e:\cindy\working\ue_extboard\sp3\veriloge\ps2/_ngo" -nt timestamp -i -p xc3s400-pq208-5 ps2.ngc ps2.ngd
map -intstyle ise -p xc3s400-pq208-5 -cm area -pr b -k 4 -c 100 -o ps2_map.ncd ps2.ngd ps2.pcf
par -w -intstyle ise -ol std -t 1 ps2_map.ncd ps2.ncd ps2.pcf
trce -intstyle ise -e 3 -l 3 -s 5 -xml ps2 ps2.ncd -o ps2.twr ps2.pcf
sch2verilog -intstyle ise -family spartan3 -w ps2.sch ps2.vf
xst -intstyle ise -ifn __projnav/ps2.xst -ofn ps2.syr
ngdbuild -intstyle ise -dd "e:\cindy\working\ue_extboard\sp3\veriloge\ps2/_ngo" -nt timestamp -uc ps2.ucf -p xc3s400-pq208-5 ps2.ngc ps2.ngd
map -intstyle ise -p xc3s400-pq208-5 -cm area -pr b -k 4 -c 100 -o ps2_map.ncd ps2.ngd ps2.pcf
par -w -intstyle ise -ol std -t 1 ps2_map.ncd ps2.ncd ps2.pcf
trce -intstyle ise -e 3 -l 3 -s 5 -xml ps2 ps2.ncd -o ps2.twr ps2.pcf
bitgen -intstyle ise -f ps2.ut ps2.ncd
sch2verilog -intstyle ise -family spartan3 -w ps2.sch ps2.vf
sch2verilog -intstyle ise -family spartan3 -w ps2.sch ps2.vf
sch2verilog -intstyle ise -family spartan3 -w ps2.sch ps2.vf
sch2verilog -intstyle ise -family spartan3 -w ps2.sch ps2.vf
sch2verilog -intstyle ise -family spartan3 -w ps2.sch ps2.vf
xst -intstyle ise -ifn __projnav/ps2.xst -ofn ps2.syr
sch2verilog -intstyle ise -family spartan3 -w ps2.sch ps2.vf
xst -intstyle ise -ifn __projnav/ps2.xst -ofn ps2.syr
ngdbuild -intstyle ise -dd "e:\cindy\working\ue_extboard\sp3\veriloge\ps2/_ngo" -nt timestamp -uc ps2.ucf -p xc3s400-pq208-5 ps2.ngc ps2.ngd
map -intstyle ise -p xc3s400-pq208-5 -cm area -pr b -k 4 -c 100 -o ps2_map.ncd ps2.ngd ps2.pcf
par -w -intstyle ise -ol std -t 1 ps2_map.ncd ps2.ncd ps2.pcf
trce -intstyle ise -e 3 -l 3 -s 5 -xml ps2 ps2.ncd -o ps2.twr ps2.pcf
bitgen -intstyle ise -f ps2.ut ps2.ncd
xst -intstyle ise -ifn __projnav/ps2.xst -ofn ps2.syr
ngdbuild -intstyle ise -dd "e:\cindy\working\ue_extboard\sp3\veriloge\ps2/_ngo" -nt timestamp -uc ps2.ucf -p xc3s400-pq208-5 ps2.ngc ps2.ngd
map -intstyle ise -p xc3s400-pq208-5 -cm area -pr b -k 4 -c 100 -o ps2_map.ncd ps2.ngd ps2.pcf
par -w -intstyle ise -ol std -t 1 ps2_map.ncd ps2.ncd ps2.pcf
trce -intstyle ise -e 3 -l 3 -s 5 -xml ps2 ps2.ncd -o ps2.twr ps2.pcf
bitgen -intstyle ise -f ps2.ut ps2.ncd
sch2verilog -intstyle ise -family spartan2 -w ps2.sch ps2.vf
xst -intstyle ise -ifn __projnav/ps2.xst -ofn ps2.syr
ngdbuild -intstyle ise -dd "e:\temp\spartan2\veriloge\interface\ps2/_ngo" -nt timestamp -uc ps2.ucf -p xc2s50-tq144-5 ps2.ngc ps2.ngd
ngdbuild -intstyle ise -dd "e:\temp\spartan2\veriloge\interface\ps2/_ngo" -nt timestamp -uc ps2.ucf -p xc2s50-tq144-5 ps2.ngc ps2.ngd
sch2verilog -intstyle ise -family spartan2 -w ps2.sch ps2.vf
xst -intstyle ise -ifn __projnav/ps2.xst -ofn ps2.syr
ngdbuild -intstyle ise -dd "e:\temp\spartan2\veriloge\interface\ps2/_ngo" -nt timestamp -uc ps2.ucf -p xc2s50-tq144-5 ps2.ngc ps2.ngd
sch2verilog -intstyle ise -family xc9500xl -w ps2.sch ps2.vf
xst -intstyle ise -ifn __projnav/ps2.xst -ofn ps2.syr
ngdbuild -dd _ngo -uc ps2.ucf -p xc9500xl ps2.ngc ps2.ngd
sch2verilog -intstyle ise -family xc9500xl -w ps2.sch ps2.vf
xst -intstyle ise -ifn __projnav/ps2.xst -ofn ps2.syr
ngdbuild -dd _ngo -uc ps2.ucf -p xc9500xl ps2.ngc ps2.ngd
cpldfit -p xc95144xl-5-tq144 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper ps2.ngd
hprep6 -s IEEE1149 -n ps2 -i ps2
sch2verilog -intstyle ise -family spartan2 -w ps2.sch ps2.vf
xst -intstyle ise -ifn __projnav/ps2.xst -ofn ps2.syr
ngdbuild -intstyle ise -dd "e:\temp\spartan2\veriloge\interface\ps2/_ngo" -uc ps2.ucf -p xc2s50-tq144-5 ps2.ngc ps2.ngd
map -intstyle ise -p xc2s50-tq144-5 -cm area -pr b -k 4 -c 100 -tx off -o ps2_map.ncd ps2.ngd ps2.pcf
par -w -intstyle ise -ol std -t 1 ps2_map.ncd ps2.ncd ps2.pcf
trce -intstyle ise -e 3 -l 3 -s 5 -xml ps2 ps2.ncd -o ps2.twr ps2.pcf
bitgen -intstyle ise -f ps2.ut ps2.ncd
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