📄 ps2.rpt
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(unused) 0 0 0 5 FB6_13 (b)
(unused) 0 0 0 5 FB6_14 121 I/O
(unused) 0 0 0 5 FB6_15 124 I/O
(unused) 0 0 0 5 FB6_16 117 I/O
XLXI_2/ps2_data_s 2 0 0 3 FB6_17 125 I/O (b)
XLXI_2/ps2_clk_s 2 0 0 3 FB6_18 (b) (b)
Signals Used by Logic in Function Block
1: ps2_clk.PIN 2: ps2_data.PIN 3: XLXN_12
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
XLXI_2/ps2_data_s .XX..................................... 2
XLXI_2/ps2_clk_s X.X..................................... 2
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB7 ***********************************
Number of function block inputs used/remaining: 29/25
Number of signals used by logic mapping into function block: 29
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 \/4 1 FB7_1 (b) (b)
XLXI_2/timer_60usec_count<0>
5 4<- \/4 0 FB7_2 71 I/O I
XLXI_2/timer_5usec_count<7>
5 4<- \/4 0 FB7_3 75 I/O (b)
XLXI_2/timer_60usec_count<9>
6 4<- \/3 0 FB7_4 (b) (b)
XLXI_2/timer_60usec_count<8>
6 3<- \/2 0 FB7_5 74 I/O (b)
XLXI_2/timer_60usec_count<7>
6 2<- \/1 0 FB7_6 76 I/O (b)
XLXI_2/timer_60usec_count<6>
6 1<- 0 0 FB7_7 77 I/O (b)
(unused) 0 0 \/5 0 FB7_8 78 I/O (b)
XLXI_2/timer_60usec_count<11>
6 5<- \/4 0 FB7_9 80 I/O (b)
XLXI_2/timer_60usec_count<10>
6 4<- \/3 0 FB7_10 79 I/O (b)
XLXI_2/timer_5usec_count<1>
6 3<- \/2 0 FB7_11 82 I/O (b)
XLXI_2/timer_60usec_count<1>
7 2<- 0 0 FB7_12 85 I/O (b)
(unused) 0 0 \/5 0 FB7_13 81 I/O (b)
XLXI_2/m1_state<2> 10 5<- 0 0 FB7_14 86 I/O (b)
ps2_clk 1 0 \/4 0 FB7_15 87 I/O I/O
XLXI_2/m1_state<3> 12 7<- 0 0 FB7_16 83 I/O (b)
ps2_data 1 0 /\3 1 FB7_17 88 I/O I/O
XLXI_2/timer_5usec_count<0>
3 0 0 2 FB7_18 (b) (b)
Signals Used by Logic in Function Block
1: XLXI_2/m1_state<0> 11: XLXI_2/timer_5usec_count<4> 21: XLXI_2/timer_60usec_count<4>
2: XLXI_2/m1_state<1> 12: XLXI_2/timer_5usec_count<5> 22: XLXI_2/timer_60usec_count<5>
3: XLXI_2/m1_state<2> 13: XLXI_2/timer_5usec_count<6> 23: XLXI_2/timer_60usec_count<6>
4: XLXI_2/m1_state<3> 14: XLXI_2/timer_5usec_count<7> 24: XLXI_2/timer_60usec_count<7>
5: XLXI_2/ps2_clk_s 15: XLXI_2/timer_60usec_count<0> 25: XLXI_2/timer_60usec_count<8>
6: XLXI_2/ps2_data_s 16: XLXI_2/timer_60usec_count<10> 26: XLXI_2/timer_60usec_count<9>
7: XLXI_2/timer_5usec_count<0> 17: XLXI_2/timer_60usec_count<11> 27: XLXN_12
8: XLXI_2/timer_5usec_count<1> 18: XLXI_2/timer_60usec_count<1> 28: led_7_OBUF/led_7_OBUF_TRST
9: XLXI_2/timer_5usec_count<2> 19: XLXI_2/timer_60usec_count<2> 29: rst
10: XLXI_2/timer_5usec_count<3> 20: XLXI_2/timer_60usec_count<3>
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
XLXI_2/timer_60usec_count<0>
XXXX..........XXXXXXXXXXXXX............. 17
XLXI_2/timer_5usec_count<7>
XXX...XXXXXXXX............X............. 12
XLXI_2/timer_60usec_count<9>
XXXX..........X..XXXXXXXXXX............. 15
XLXI_2/timer_60usec_count<8>
XXXX..........X..XXXXXXXX.X............. 14
XLXI_2/timer_60usec_count<7>
XXXX..........X..XXXXXXX..X............. 13
XLXI_2/timer_60usec_count<6>
XXXX..........X..XXXXXX...X............. 12
XLXI_2/timer_60usec_count<11>
XXXX..........XXXXXXXXXXXXX............. 17
XLXI_2/timer_60usec_count<10>
XXXX..........XX.XXXXXXXXXX............. 16
XLXI_2/timer_5usec_count<1>
XXX...XXXXXXXX............X............. 12
XLXI_2/timer_60usec_count<1>
XXXX..........XXXXXXXXXXXXX............. 17
XLXI_2/m1_state<2> XXXXXXXXXXXXXX............X.X........... 16
ps2_clk XXXX.................................... 4
XLXI_2/m1_state<3> XXXXXXXXXXXXXXXXXXXXXXXXXXX.X........... 28
ps2_data ...........................X............ 1
XLXI_2/timer_5usec_count<0>
XXX...XXXXXXXX............X............. 12
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB8 ***********************************
Number of function block inputs used/remaining: 0/54
Number of signals used by logic mapping into function block: 0
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB8_1 (b)
(unused) 0 0 0 5 FB8_2 91 I/O
(unused) 0 0 0 5 FB8_3 95 I/O
(unused) 0 0 0 5 FB8_4 97 I/O
(unused) 0 0 0 5 FB8_5 92 I/O
(unused) 0 0 0 5 FB8_6 93 I/O
(unused) 0 0 0 5 FB8_7 (b)
(unused) 0 0 0 5 FB8_8 94 I/O
(unused) 0 0 0 5 FB8_9 96 I/O
(unused) 0 0 0 5 FB8_10 101 I/O
(unused) 0 0 0 5 FB8_11 98 I/O
(unused) 0 0 0 5 FB8_12 100 I/O
(unused) 0 0 0 5 FB8_13 103 I/O
(unused) 0 0 0 5 FB8_14 102 I/O
(unused) 0 0 0 5 FB8_15 104 I/O
(unused) 0 0 0 5 FB8_16 107 I/O
(unused) 0 0 0 5 FB8_17 105 I/O
(unused) 0 0 0 5 FB8_18 (b)
******************************* Equations ********************************
********** Mapped Logic **********
assign $OpTx$$OpTx$FX_DC$743_INV$1450 = XLXI_4/count[0].EXP;
assign $OpTx$INV$742 = ((XLXI_2/left_shift_key.EXP)
|| (rst && !XLXI_2/bit_count[0])
|| (rst && !XLXI_2/bit_count[1])
|| (rst && XLXI_2/bit_count[2]));
FTCPE FTCPE_XLXI_2/bit_count0 (XLXI_2/bit_count[0],XLXI_2/bit_count_T[0],XLXN_12,1'b0,1'b0);
assign XLXI_2/bit_count_T[0] = ((XLXI_2/bit_count[1].EXP)
|| (!rst && XLXI_2/bit_count[0])
|| (XLXI_2/bit_count[0] && XLXI_2/bit_count[1] &&
!XLXI_2/bit_count[2] && XLXI_2/bit_count[3]));
FTCPE FTCPE_XLXI_2/bit_count1 (XLXI_2/bit_count[1],XLXI_2/bit_count_T[1],XLXN_12,1'b0,1'b0);
assign XLXI_2/bit_count_T[1] = ((XLXI_2/bit_count[2].EXP)
|| (!rst && XLXI_2/bit_count[1]));
FTCPE FTCPE_XLXI_2/bit_count2 (XLXI_2/bit_count[2],EXP18_.EXP,XLXN_12,1'b0,1'b0);
FTCPE FTCPE_XLXI_2/bit_count3 (XLXI_2/bit_count[3],XLXI_2/bit_count_T[3],XLXN_12,1'b0,1'b0);
assign XLXI_2/bit_count_T[3] = ((XLXI_2/timer_60usec_count[2].EXP)
|| (!rst && XLXI_2/bit_count[3])
|| (XLXI_2/bit_count[0] && XLXI_2/bit_count[1] &&
!XLXI_2/bit_count[2] && XLXI_2/bit_count[3])
|| (XLXI_2/bit_count[3] && !XLXI_2/m1_state[0] &&
XLXI_2/m1_state[1] && XLXI_2/m1_state[2] && !XLXI_2/m1_state[3])
|| (rst && XLXI_2/bit_count[0] && XLXI_2/bit_count[1] &&
XLXI_2/bit_count[2] && XLXI_2/m1_state[0] && !XLXI_2/m1_state[1] &&
XLXI_2/m1_state[3]));
FDCPE FDCPE_XLXI_2/hold_released (XLXI_2/hold_released,XLXI_2/hold_released_D,XLXN_12,1'b0,1'b0);
assign XLXI_2/hold_released_D = (($OpTx$INV$742.EXP)
|| (rst && !XLXI_2/bit_count[0] && XLXI_2/hold_released)
|| (rst && !XLXI_2/bit_count[1] && XLXI_2/hold_released)
|| (rst && !XLXI_2/bit_count[3] && XLXI_2/hold_released)
|| (!XLXI_2/q[4] && XLXI_2/q[6] && !XLXI_2/q[1] &&
!XLXI_2/q[2] && XLXI_2/q[7] && rst && !XLXI_2/q[3] && XLXI_2/q[8] &&
XLXI_2/hold_released));
FTCPE FTCPE_XLXI_2/left_shift_key (XLXI_2/left_shift_key,XLXI_2/left_shift_key_T,XLXN_12,1'b0,1'b0);
assign XLXI_2/left_shift_key_T = ((XLXI_2/q[1].EXP)
|| (!rst && XLXI_2/left_shift_key)
|| (!XLXI_2/q[4] && !XLXI_2/q[6] && !XLXI_2/q[1] &&
XLXI_2/q[5] && XLXI_2/q[2] && !XLXI_2/q[7] && !XLXI_2/q[3] &&
!XLXI_2/q[8] && XLXI_2/bit_count[0] && XLXI_2/bit_count[1] &&
!XLXI_2/bit_count[2] && XLXI_2/bit_count[3] && XLXI_2/hold_released &&
XLXI_2/left_shift_key));
FTCPE FTCPE_XLXI_2/m1_state0 (XLXI_2/m1_state[0],XLXI_2/m1_state_T[0],XLXN_12,1'b0,1'b0);
assign XLXI_2/m1_state_T[0] = ((EXP20_.EXP)
|| (EXP21_.EXP)
|| (!rst && !XLXI_2/m1_state[0])
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