startup_data.asm

凌阳16位单片机的启动代码

.define _MUST_INIT_GLOBAL_VAR_

.include  .\GPL162xxLibs\include\Body.inc

.define SYS_PLL_ClockMhz 51	// PLL clock =? MHz
.define SYS_FLASH_ACESS_TIME	70	//accesstime=?ns
.define SYS_FLASH_ACESS_CLK		((SYS_PLL_ClockMhz*SYS_FLASH_ACESS_TIME)/1000)
.define SYS_FLASH_PAPGE_ACESS_TIME	30
.define SYS_FLASH_PAGE_ACESS_CLK	((SYS_PLL_ClockMhz*SYS_FLASH_PAPGE_ACESS_TIME)/1000)
//.define FLASH_PAGE_MODE


.public _RESET
.public	__sn_loop, __sn_loop2 
.public _CS0Boot

//.iram
.ram_bank0
.var	_CS0Boot

.external _main, __sn_sp_val
.ifdef _MUST_INIT_GLOBAL_VAR_
.external __sn_init_table
.endif

unSP_StartUp: .section .text, .addr=0xf800
StartUp:
_RESET:
	int off
	sp = __sn_sp_val
//Check CS0 Boot Mode
	r1 = 0
	[_CS0Boot] = r1
	r1 = [P_IOB_Data]
	r1 = r1 & 0x3;
	jnz	 ?L_Cont
?CS0Boot:
	r1 = 1
	[_CS0Boot] = r1

?L_Cont:	
	r1=[P_RAW_WAR]	
	r1&=~0x0f	
	r1|=0x05
	[P_RAW_WAR]=r1

//////////////////////		 	//memory control setup
	r1 = 0x0007					//32K boot size
	[P_MAPSEL] = r1
	.if (SYS_PLL_ClockMhz==96)
		r2 = 0x0007
	.else
	//	r2 = 0x0004
		r2 = SYS_FLASH_ACESS_CLK
	.endif

//	r1 = r2 + 0x3f00
	r1 = r2 + 0x3f80             // cs0 nor flash
	[P_MCS0_Ctrl] = r1			//cs0 SRAM 2M-64K word 
	r1 = r2 + 0x0040
	[P_MCS1_Ctrl] = r1			//cs1 SRAM 64K word 
	r1 = r2 + 0x1f40	
	[P_MCS2_Ctrl] = r1			//cs2 SRAM 2M word 
	r1 = r2 + 0x0040		
	[P_MCS3_Ctrl] = r1			//cs3 SRAM 64K word
	r1 = r2 + 0x0040	
	[P_MCS4_Ctrl] = r1			//cs4 SRAM 64K word	
	
//==============Jacob add  page mode===========	
.ifdef FLASH_PAGE_MODE		
	r1=SYS_FLASH_PAGE_ACESS_CLK;
	r1=r1 lsl 2;
	//0x01 For Ram ,0x02 for flash
	r1|=0x02
	[P_MCS0_Page]=r1
.endif
//=============================================
	
//	r1 = r2 + 0x7f00//081202
//	[P_MCS0_Ctrl] = r1			//cs0 SRAM 512K word 
//	r1 = r2 + 0x1f40
//	[P_MCS1_Ctrl] = r1			//cs1 SRAM 2M word 
//	r1 = r2 + 0x0040	
//	[P_MCS2_Ctrl] = r1			//cs2 SRAM 64K word 
//	r1 = r2 + 0x0040		
//	[P_MCS3_Ctrl] = r1			//cs3 SRAM 64K word
//	r1 = r2 + 0x0040	
//	[P_MCS4_Ctrl] = r1			//cs4 SRAM 64K word			
//////////////////////////
.if ( GPL16250VA + GPL16240VA + GPL16230A)
/////////////////////// 		//SDRAM setup
	r1=0x0002        		
	[P_SDRAM_EN]=r1
	.if (SYS_PLL_ClockMhz==96)
	r1=0x05DA
	[P_SDRAM_CBRCYC]=r1
	r1=0x0F58
	[P_SDRAM_Timing]=r1
	r1=0x2400
	[P_SDRAM_Ctrl1]=r1
	r1=0x0000
	[P_SDRAM_Misc]=r1
	r1=0x0013
	[P_SDRAM_Ctrl0]=r1	
	.else
	r1=0x02E0
	[P_SDRAM_CBRCYC]=r1
	r1=0x0A34
	[P_SDRAM_Timing]=r1
	r1=0x2400
	[P_SDRAM_Ctrl1]=r1
	r1=0x0000
	[P_SDRAM_Misc]=r1
	r1=0x0013
	[P_SDRAM_Ctrl0]=r1	
	.endif
	r1=0x36DB
	[P_SDRAM_Drv]=r1
	r1=0x36DB
	[P_IOD_Drv]=r1
	r1=0x36DB
	[P_MEM_Drv]=r1
	r1=0x36DB
//	[P_CS_Drv]=r1
	[0x787e] = r1
//////////////////// 	
.endif
/////////////////////////		//I-cache setup
	r1=0x02		
	[P_Cache_Ctrl]=r1
	nop
	nop
cacheloop?:	
	r1=[P_Cache_Ctrl]
	test	r1,0x02
	jnz	cacheloop?
	r1=0x0d						//for signal-page mode
	[P_Cache_Ctrl]=r1
/////////////////////////

///////////////////////////		//system clock setup
?WaitPll0:
	r1 = [P_Power_State]
	r1 &= 0x07
	jz ?WaitPll0

	r1 = SYS_PLL_ClockMhz / 3					// PLL clock
	[P_PLLChange]=r1
	.if (SYS_PLL_ClockMhz==96)	
	r1 = 0x8418
	.else
	r1 = 0x8410
	.endif
	//r1 |= 0x0200
	[P_Clock_Ctrl] = r1			// pll enable, system clock=PLL clock
	
?chk_pws:
	r1 = [P_Power_State]
	r1 &= 0x0007
	cmp r1, 0x0002
	jne ?chk_pws
///////////////////////////////

.ifdef _MUST_INIT_GLOBAL_VAR_
///////////////////////////////		//global variable initial value setup
	ds = seg __sn_init_table
	r1 = offset __sn_init_table
	r2 = ds:[r1++]		// item count
	jmp __judge_itcount

__next_item:
	    push sr to [sp]
        push r2 to [sp]
        r3 = DS:[r1++]      // DS of iram
        r4 = DS:[r1++]      // dest
        r2 = DS:[r1++]      // DS
        r5 = DS:[r1++]      // src
        push r1 to [sp]
        r1 = DS:[r1]        // block size

        cmp r1, 0
        je __move_ok

		ds=r2				//Initial DS of src
__move_data:
        r2 = DS:[r5++]
        push sr to [sp]     // store DS of src
  		ds=r3
        DS:[r4++] = r2
		r3=ds
        r1 = r1 - 1
        pop sr from [sp]    // restore DS of src
__judge_bksize:
        cmp r1, 0
        jne __move_data

__move_ok:
        pop r1 from [sp]
        r1 = r1 + 1

        pop r2 from [sp]
        pop sr from [sp]
        r2 = r2 - 1
__judge_itcount:
        cmp r2,0
        jne __next_item
__no_item:
.endif
	call _main
__sn_loop2:
	jmp __sn_loop2
	nop
	nop

__sn_loop: 
	reti
///////////////////////////////	


//------------------------------------------------------------------------------
.DEBUG
    .DW '.stabs "startup_code.",0x3c,0,0,0',0x0d,0x0a
.DEBUG
    .DW '.stabs "__sn_main:F15",36,0,0,', 0, 0
    .DW offset _main,seg _main
    .DW 0x0d,0x0a           
.DEBUG
    .DW '.stabs "__sn_end:F15",36,0,0,', 0, 0
    .DW offset __sn_loop2,seg __sn_loop2
    .DW 0x0d,0x0a   
.DEBUG
    .DW '.stabs "__sn_exception:F15",36,0,0,', 0, 0
    .DW offset __sn_loop,seg __sn_loop
    .DW 0x0d,0x0a   

.END

//--------------------------------------end of startup_Data.asm----------------------------------------