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📄 gwdvpb.map.rpt

📁 (1)频率测试功能:测频范围0.1H~200H。 测试精度:恒为百万分之一。 (2)脉宽测试功能:范围0.1us~1s
💻 RPT
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; I/O pins                          ; 18      ;
; Maximum fan-out node              ; CLR     ;
; Maximum fan-out                   ; 68      ;
; Total fan-out                     ; 436     ;
; Average fan-out                   ; 3.35    ;
+-----------------------------------+---------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                                                                                                                                                         ;
+----------------------------------------+-------------+--------------+-------------+------+--------------+-------------------+------------------+-----------------+------------+--------------------------------------------------------------+--------------+
; Compilation Hierarchy Node             ; Logic Cells ; LC Registers ; Memory Bits ; Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Packed LCs ; Full Hierarchy Name                                          ; Library Name ;
+----------------------------------------+-------------+--------------+-------------+------+--------------+-------------------+------------------+-----------------+------------+--------------------------------------------------------------+--------------+
; |GWDVPB                                ; 112 (48)    ; 68           ; 0           ; 18   ; 44 (44)      ; 1 (1)             ; 67 (3)           ; 64 (0)          ; 0 (0)      ; |GWDVPB                                                      ; work         ;
;    |lpm_counter:BZQ_rtl_0|             ; 32 (0)      ; 32           ; 0           ; 0    ; 0 (0)        ; 0 (0)             ; 32 (0)           ; 32 (0)          ; 0 (0)      ; |GWDVPB|lpm_counter:BZQ_rtl_0                                ; work         ;
;       |alt_counter_f10ke:wysi_counter| ; 32 (32)     ; 32           ; 0           ; 0    ; 0 (0)        ; 0 (0)             ; 32 (32)          ; 32 (32)         ; 0 (0)      ; |GWDVPB|lpm_counter:BZQ_rtl_0|alt_counter_f10ke:wysi_counter ; work         ;
;    |lpm_counter:TSQ_rtl_1|             ; 32 (0)      ; 32           ; 0           ; 0    ; 0 (0)        ; 0 (0)             ; 32 (0)           ; 32 (0)          ; 0 (0)      ; |GWDVPB|lpm_counter:TSQ_rtl_1                                ; work         ;
;       |alt_counter_f10ke:wysi_counter| ; 32 (32)     ; 32           ; 0           ; 0    ; 0 (0)        ; 0 (0)             ; 32 (32)          ; 32 (32)         ; 0 (0)      ; |GWDVPB|lpm_counter:TSQ_rtl_1|alt_counter_f10ke:wysi_counter ; work         ;
+----------------------------------------+-------------+--------------+-------------+------+--------------+-------------------+------------------+-----------------+------------+--------------------------------------------------------------+--------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.


+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 68    ;
; Number of registers using Synchronous Clear  ; 0     ;
; Number of registers using Synchronous Load   ; 0     ;
; Number of registers using Asynchronous Clear ; 68    ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 64    ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+-----------------------------------------------+
; Source assignments for lpm_counter:BZQ_rtl_0  ;
+---------------------------+-------+------+----+
; Assignment                ; Value ; From ; To ;
+---------------------------+-------+------+----+
; SUPPRESS_DA_RULE_INTERNAL ; a101  ; -    ; -  ;
; SUPPRESS_DA_RULE_INTERNAL ; s102  ; -    ; -  ;
; SUPPRESS_DA_RULE_INTERNAL ; s103  ; -    ; -  ;
+---------------------------+-------+------+----+


+-----------------------------------------------+
; Source assignments for lpm_counter:TSQ_rtl_1  ;
+---------------------------+-------+------+----+
; Assignment                ; Value ; From ; To ;
+---------------------------+-------+------+----+
; SUPPRESS_DA_RULE_INTERNAL ; a101  ; -    ; -  ;
; SUPPRESS_DA_RULE_INTERNAL ; s102  ; -    ; -  ;
; SUPPRESS_DA_RULE_INTERNAL ; s103  ; -    ; -  ;
+---------------------------+-------+------+----+


+------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: lpm_counter:BZQ_rtl_0 ;
+------------------------+-------------------+---------------------------+
; Parameter Name         ; Value             ; Type                      ;
+------------------------+-------------------+---------------------------+
; AUTO_CARRY_CHAINS      ; ON                ; AUTO_CARRY                ;
; IGNORE_CARRY_BUFFERS   ; OFF               ; IGNORE_CARRY              ;
; AUTO_CASCADE_CHAINS    ; ON                ; AUTO_CASCADE              ;
; IGNORE_CASCADE_BUFFERS ; OFF               ; IGNORE_CASCADE            ;
; LPM_WIDTH              ; 32                ; Untyped                   ;
; LPM_DIRECTION          ; UP                ; Untyped                   ;
; LPM_MODULUS            ; 0                 ; Untyped                   ;
; LPM_AVALUE             ; UNUSED            ; Untyped                   ;
; LPM_SVALUE             ; UNUSED            ; Untyped                   ;
; LPM_PORT_UPDOWN        ; PORT_CONNECTIVITY ; Untyped                   ;
; DEVICE_FAMILY          ; ACEX1K            ; Untyped                   ;
; CARRY_CHAIN            ; MANUAL            ; Untyped                   ;
; CARRY_CHAIN_LENGTH     ; 48                ; CARRY_CHAIN_LENGTH        ;
; NOT_GATE_PUSH_BACK     ; ON                ; NOT_GATE_PUSH_BACK        ;
; CARRY_CNT_EN           ; SMART             ; Untyped                   ;
; LABWIDE_SCLR           ; ON                ; Untyped                   ;
; USE_NEW_VERSION        ; TRUE              ; Untyped                   ;
; CBXI_PARAMETER         ; NOTHING           ; Untyped                   ;
+------------------------+-------------------+---------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: lpm_counter:TSQ_rtl_1 ;
+------------------------+-------------------+---------------------------+
; Parameter Name         ; Value             ; Type                      ;
+------------------------+-------------------+---------------------------+
; AUTO_CARRY_CHAINS      ; ON                ; AUTO_CARRY                ;
; IGNORE_CARRY_BUFFERS   ; OFF               ; IGNORE_CARRY              ;
; AUTO_CASCADE_CHAINS    ; ON                ; AUTO_CASCADE              ;
; IGNORE_CASCADE_BUFFERS ; OFF               ; IGNORE_CASCADE            ;
; LPM_WIDTH              ; 32                ; Untyped                   ;
; LPM_DIRECTION          ; UP                ; Untyped                   ;
; LPM_MODULUS            ; 0                 ; Untyped                   ;
; LPM_AVALUE             ; UNUSED            ; Untyped                   ;
; LPM_SVALUE             ; UNUSED            ; Untyped                   ;
; LPM_PORT_UPDOWN        ; PORT_CONNECTIVITY ; Untyped                   ;
; DEVICE_FAMILY          ; ACEX1K            ; Untyped                   ;
; CARRY_CHAIN            ; MANUAL            ; Untyped                   ;
; CARRY_CHAIN_LENGTH     ; 48                ; CARRY_CHAIN_LENGTH        ;
; NOT_GATE_PUSH_BACK     ; ON                ; NOT_GATE_PUSH_BACK        ;
; CARRY_CNT_EN           ; SMART             ; Untyped                   ;
; LABWIDE_SCLR           ; ON                ; Untyped                   ;
; USE_NEW_VERSION        ; TRUE              ; Untyped                   ;
; CBXI_PARAMETER         ; NOTHING           ; Untyped                   ;
+------------------------+-------------------+---------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 7.2 Build 207 03/18/2008 Service Pack 3 SJ Full Version
    Info: Processing started: Thu Apr 09 14:16:13 2009
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off GWDVPB -c GWDVPB
Info: Found 2 design units, including 1 entities, in source file GWDVPB.vhd
    Info: Found design unit 1: GWDVPB-BEHAV
    Info: Found entity 1: GWDVPB
Info: Elaborating entity "GWDVPB" for the top level hierarchy
Info: Inferred 2 megafunctions from design logic
    Info: Inferred lpm_counter megafunction (LPM_WIDTH=32) from the following logic: "BZQ[0]~0"
    Info: Inferred lpm_counter megafunction (LPM_WIDTH=32) from the following logic: "TSQ[0]~0"
Info: Found 1 design units, including 1 entities, in source file ../../../../program files/altera/quartus/libraries/megafunctions/lpm_counter.tdf
    Info: Found entity 1: lpm_counter
Info: Elaborated megafunction instantiation "lpm_counter:BZQ_rtl_0"
Info: Found 1 design units, including 1 entities, in source file ../../../../program files/altera/quartus/libraries/megafunctions/alt_counter_f10ke.tdf
    Info: Found entity 1: alt_counter_f10ke
Info: Elaborated megafunction instantiation "lpm_counter:BZQ_rtl_0|alt_counter_f10ke:wysi_counter", which is child of megafunction instantiation "lpm_counter:BZQ_rtl_0"
Info: Instantiated megafunction "lpm_counter:BZQ_rtl_0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "32"
    Info: Parameter "LPM_DIRECTION" = "UP"
    Info: Parameter "LPM_TYPE" = "LPM_COUNTER"
Info: Implemented 130 device resources after synthesis - the final resource count might be different
    Info: Implemented 8 input pins
    Info: Implemented 10 output pins
    Info: Implemented 112 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings
    Info: Allocated 155 megabytes of memory during processing
    Info: Processing ended: Thu Apr 09 14:16:17 2009
    Info: Elapsed time: 00:00:04


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