📄 bcd7.vhd
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LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY BCD7 IS
PORT(BCD:IN STD_LOGIC_VECTOR(3 DOWNTO 0);
LED:OUT STD_LOGIC_VECTOR(6 DOWNTO 0));
END BCD7;
ARCHITECTURE ART OF BCD7 IS
BEGIN
LED<= "1111110"WHEN BCD="0000"ELSE
"0110000"WHEN BCD="0001"ELSE
"1101101"WHEN BCD="0010"ELSE
"1111001"WHEN BCD="0011"ELSE
"0110011"WHEN BCD="0100"ELSE
"1011011"WHEN BCD="0101"ELSE
"1011111"WHEN BCD="0110"ELSE
"1110000"WHEN BCD="0111"ELSE
"1111111"WHEN BCD="1000"ELSE
"1111011"WHEN BCD="1001"ELSE
"0000000";
END ART;
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