📄 mulx.rpt
字号:
- 4 - C 01 DFFE + 1 2 1 0 :42
- 2 - C 11 DFFE + 0 2 1 0 :44
- 4 - C 11 DFFE + 0 2 1 0 :46
- 3 - C 11 DFFE + 0 4 1 0 :48
- 6 - C 09 DFFE + 1 2 0 21 COUNT3 (:50)
- 3 - C 09 DFFE + 1 2 0 20 COUNT2 (:51)
- 5 - C 09 DFFE + 1 2 0 11 COUNT1 (:52)
- 8 - C 09 DFFE + 1 0 0 11 COUNT0 (:53)
- 7 - C 09 OR2 ! 0 4 0 7 :89
- 5 - C 11 AND2 0 4 0 4 :551
- 1 - C 07 OR2 2 2 0 1 :554
- 3 - C 07 AND2 1 3 0 1 :567
- 2 - C 07 OR2 0 4 0 1 :568
- 8 - C 11 AND2 0 4 0 4 :575
- 4 - C 07 OR2 1 3 0 1 :578
- 4 - C 08 AND2 0 4 0 4 :587
- 8 - C 07 OR2 1 2 0 1 :590
- 6 - C 08 AND2 0 4 0 4 :599
- 1 - C 06 OR2 1 2 0 1 :602
- 2 - C 09 AND2 0 3 0 4 :611
- 3 - C 06 OR2 1 2 0 1 :614
- 1 - C 11 AND2 0 4 0 4 :623
- 5 - C 07 OR2 1 2 0 1 :626
- 6 - C 11 AND2 0 4 0 4 :635
- 7 - C 07 OR2 1 2 0 1 :638
- 7 - C 11 AND2 0 4 0 4 :647
- 1 - C 05 OR2 2 2 0 1 :659
- 4 - C 05 AND2 1 3 0 1 :663
- 3 - C 05 OR2 0 4 0 1 :664
- 8 - C 05 OR2 1 3 0 1 :665
- 7 - C 08 OR2 1 2 0 1 :668
- 5 - C 08 OR2 1 2 0 1 :671
- 5 - C 05 OR2 1 2 0 1 :674
- 6 - C 05 OR2 1 2 0 1 :677
- 7 - C 05 OR2 1 2 0 1 :680
- 1 - C 03 OR2 2 2 0 1 :692
- 3 - C 03 AND2 1 3 0 1 :696
- 2 - C 03 OR2 0 4 0 1 :697
- 4 - C 03 OR2 1 3 0 1 :698
- 3 - C 08 OR2 1 2 0 1 :701
- 8 - C 08 OR2 1 2 0 1 :704
- 5 - C 03 OR2 1 2 0 1 :707
- 7 - C 03 OR2 1 2 0 1 :710
- 8 - C 03 OR2 1 2 0 1 :713
- 1 - C 01 OR2 2 2 0 1 :725
- 3 - C 01 AND2 1 3 0 1 :729
- 2 - C 01 OR2 0 4 0 1 :730
- 6 - C 01 OR2 1 3 0 1 :731
- 1 - C 08 OR2 1 2 0 1 :734
- 2 - C 08 OR2 1 2 0 1 :737
- 5 - C 01 OR2 1 2 0 1 :740
- 7 - C 01 OR2 1 2 0 1 :743
- 8 - C 01 OR2 1 2 0 1 :746
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
p = Packed register
Device-Specific Information: c:\trangeaclock2\mulx.rpt
mulx
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 0/ 96( 0%) 3/ 48( 6%) 0/ 48( 0%) 0/16( 0%) 3/16( 18%) 0/16( 0%)
B: 0/ 96( 0%) 1/ 48( 2%) 0/ 48( 0%) 0/16( 0%) 1/16( 6%) 0/16( 0%)
C: 27/ 96( 28%) 28/ 48( 58%) 0/ 48( 0%) 7/16( 43%) 1/16( 6%) 0/16( 0%)
D: 0/ 96( 0%) 0/ 48( 0%) 0/ 48( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
E: 0/ 96( 0%) 1/ 48( 2%) 0/ 48( 0%) 0/16( 0%) 1/16( 6%) 0/16( 0%)
F: 0/ 96( 0%) 0/ 48( 0%) 0/ 48( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 3/24( 12%) 3/4( 75%) 0/4( 0%) 0/4( 0%)
02: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
03: 3/24( 12%) 2/4( 50%) 0/4( 0%) 0/4( 0%)
04: 2/24( 8%) 2/4( 50%) 0/4( 0%) 0/4( 0%)
05: 2/24( 8%) 2/4( 50%) 0/4( 0%) 0/4( 0%)
06: 2/24( 8%) 1/4( 25%) 1/4( 25%) 0/4( 0%)
07: 3/24( 12%) 2/4( 50%) 0/4( 0%) 0/4( 0%)
08: 2/24( 8%) 2/4( 50%) 0/4( 0%) 0/4( 0%)
09: 2/24( 8%) 2/4( 50%) 0/4( 0%) 0/4( 0%)
10: 2/24( 8%) 2/4( 50%) 0/4( 0%) 0/4( 0%)
11: 3/24( 12%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
12: 3/24( 12%) 2/4( 50%) 0/4( 0%) 0/4( 0%)
13: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
14: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
15: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
16: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
17: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
18: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
19: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
20: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
21: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
22: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
23: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
24: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: c:\trangeaclock2\mulx.rpt
mulx
** CLOCK SIGNALS **
Type Fan-out Name
INPUT 11 CLK
Device-Specific Information: c:\trangeaclock2\mulx.rpt
mulx
** CLEAR SIGNALS **
Type Fan-out Name
INPUT 4 CLR
Device-Specific Information: c:\trangeaclock2\mulx.rpt
mulx
** EQUATIONS **
CLK : INPUT;
CLR : INPUT;
EN : INPUT;
HOUR0 : INPUT;
HOUR1 : INPUT;
HOUR2 : INPUT;
HOUR3 : INPUT;
M_1MIN0 : INPUT;
M_1MIN1 : INPUT;
M_1MIN2 : INPUT;
M_1MIN3 : INPUT;
M_10MIN0 : INPUT;
M_10MIN1 : INPUT;
M_10MIN2 : INPUT;
M_10MIN3 : INPUT;
S_1MS0 : INPUT;
S_1MS1 : INPUT;
S_1MS2 : INPUT;
S_1MS3 : INPUT;
S_1S0 : INPUT;
S_1S1 : INPUT;
S_1S2 : INPUT;
S_1S3 : INPUT;
S_10MS0 : INPUT;
S_10MS1 : INPUT;
S_10MS2 : INPUT;
S_10MS3 : INPUT;
S_10S0 : INPUT;
S_10S1 : INPUT;
S_10S2 : INPUT;
S_10S3 : INPUT;
S_100MS0 : INPUT;
S_100MS1 : INPUT;
S_100MS2 : INPUT;
S_100MS3 : INPUT;
-- Node name is ':53' = 'COUNT0'
-- Equation name is 'COUNT0', location is LC8_C9, type is buried.
COUNT0 = DFFE( _EQ001, GLOBAL( CLK), GLOBAL(!CLR), VCC, VCC);
_EQ001 = COUNT0 & !EN
# !COUNT0 & EN;
-- Node name is ':52' = 'COUNT1'
-- Equation name is 'COUNT1', location is LC5_C9, type is buried.
COUNT1 = DFFE( _EQ002, GLOBAL( CLK), GLOBAL(!CLR), VCC, VCC);
_EQ002 = COUNT0 & !COUNT1 & EN & !_LC7_C9
# !COUNT0 & COUNT1 & !_LC7_C9
# COUNT1 & !EN;
-- Node name is ':51' = 'COUNT2'
-- Equation name is 'COUNT2', location is LC3_C9, type is buried.
COUNT2 = DFFE( _EQ003, GLOBAL( CLK), GLOBAL(!CLR), VCC, VCC);
_EQ003 = COUNT2 & !_LC4_C9 & !_LC7_C9
# !COUNT2 & EN & _LC4_C9 & !_LC7_C9
# COUNT2 & !EN;
-- Node name is ':50' = 'COUNT3'
-- Equation name is 'COUNT3', location is LC6_C9, type is buried.
COUNT3 = DFFE( _EQ004, GLOBAL( CLK), GLOBAL(!CLR), VCC, VCC);
_EQ004 = EN & _LC1_C9 & !_LC7_C9
# COUNT3 & !EN;
-- Node name is 'OUTBCD0'
-- Equation name is 'OUTBCD0', type is output
OUTBCD0 = _LC4_C1;
-- Node name is 'OUTBCD1'
-- Equation name is 'OUTBCD1', type is output
OUTBCD1 = _LC6_C3;
-- Node name is 'OUTBCD2'
-- Equation name is 'OUTBCD2', type is output
OUTBCD2 = _LC2_C5;
-- Node name is 'OUTBCD3'
-- Equation name is 'OUTBCD3', type is output
OUTBCD3 = _LC6_C7;
-- Node name is 'SEG0'
-- Equation name is 'SEG0', type is output
SEG0 = _LC3_C11;
-- Node name is 'SEG1'
-- Equation name is 'SEG1', type is output
SEG1 = _LC4_C11;
-- Node name is 'SEG2'
-- Equation name is 'SEG2', type is output
SEG2 = _LC2_C11;
-- Node name is '|LPM_ADD_SUB:114|addcore:adder|:55' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC4_C9', type is buried
_LC4_C9 = LCELL( _EQ005);
_EQ005 = COUNT0 & COUNT1;
-- Node name is '|LPM_ADD_SUB:114|addcore:adder|:69' from file "addcore.tdf" line 316, column 45
-- Equation name is '_LC1_C9', type is buried
_LC1_C9 = LCELL( _EQ006);
_EQ006 = !COUNT2 & COUNT3
# COUNT3 & !_LC4_C9
# COUNT2 & !COUNT3 & _LC4_C9;
-- Node name is ':36'
-- Equation name is '_LC6_C7', type is buried
_LC6_C7 = DFFE( _EQ007, GLOBAL( CLK), VCC, VCC, VCC);
_EQ007 = _LC7_C7 & !_LC7_C11
# _LC7_C11 & S_1MS3;
-- Node name is ':38'
-- Equation name is '_LC2_C5', type is buried
_LC2_C5 = DFFE( _EQ008, GLOBAL( CLK), VCC, VCC, VCC);
_EQ008 = _LC7_C5 & !_LC7_C11
# _LC7_C11 & S_1MS2;
-- Node name is ':40'
-- Equation name is '_LC6_C3', type is buried
_LC6_C3 = DFFE( _EQ009, GLOBAL( CLK), VCC, VCC, VCC);
_EQ009 = !_LC7_C11 & _LC8_C3
# _LC7_C11 & S_1MS1;
-- Node name is ':42'
-- Equation name is '_LC4_C1', type is buried
_LC4_C1 = DFFE( _EQ010, GLOBAL( CLK), VCC, VCC, VCC);
_EQ010 = !_LC7_C11 & _LC8_C1
# _LC7_C11 & S_1MS0;
-- Node name is ':44'
-- Equation name is '_LC2_C11', type is buried
_LC2_C11 = DFFE( _EQ011, GLOBAL( CLK), VCC, VCC, VCC);
_EQ011 = COUNT2 & !COUNT3;
-- Node name is ':46'
-- Equation name is '_LC4_C11', type is buried
_LC4_C11 = DFFE( _EQ012, GLOBAL( CLK), VCC, VCC, VCC);
_EQ012 = COUNT1 & !COUNT3;
-- Node name is ':48'
-- Equation name is '_LC3_C11', type is buried
_LC3_C11 = DFFE( _EQ013, GLOBAL( CLK), VCC, VCC, VCC);
_EQ013 = COUNT0 & !COUNT1 & !COUNT2
# COUNT0 & !COUNT3;
-- Node name is ':89'
-- Equation name is '_LC7_C9', type is buried
!_LC7_C9 = _LC7_C9~NOT;
_LC7_C9~NOT = LCELL( _EQ014);
_EQ014 = !COUNT3
# !COUNT0
# COUNT1
# COUNT2;
-- Node name is ':551'
-- Equation name is '_LC5_C11', type is buried
_LC5_C11 = LCELL( _EQ015);
_EQ015 = !COUNT0 & !COUNT1 & !COUNT2 & COUNT3;
-- Node name is ':554'
-- Equation name is '_LC1_C7', type is buried
_LC1_C7 = LCELL( _EQ016);
_EQ016 = !_LC5_C11 & _LC7_C9 & S_10MS3
# !_LC7_C9 & S_1MS3
# _LC5_C11 & S_1MS3;
-- Node name is ':567'
-- Equation name is '_LC3_C7', type is buried
_LC3_C7 = LCELL( _EQ017);
_EQ017 = COUNT2 & !COUNT3 & HOUR3 & _LC4_C9;
-- Node name is ':568'
-- Equation name is '_LC2_C7', type is buried
_LC2_C7 = LCELL( _EQ018);
_EQ018 = !COUNT2 & _LC1_C7
# _LC1_C7 & !_LC4_C9
# COUNT3 & _LC1_C7;
-- Node name is ':575'
-- Equation name is '_LC8_C11', type is buried
_LC8_C11 = LCELL( _EQ019);
_EQ019 = !COUNT0 & COUNT1 & COUNT2 & !COUNT3;
-- Node name is ':578'
-- Equation name is '_LC4_C7', type is buried
_LC4_C7 = LCELL( _EQ020);
_EQ020 = _LC2_C7 & !_LC8_C11
# _LC3_C7 & !_LC8_C11
# _LC8_C11 & M_10MIN3;
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