ctrl.vhd

数字秒表具有正及时倒计时功能包括一些设计要求和原资料

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY CTRL IS    
PORT(CLR,CLK,SP:IN STD_LOGIC; 
             EN:OUT STD_LOGIC);
END CTRL;
ARCHITECTURE BEHAVE OF CTRL IS 
CONSTANT S0 : STD_LOGIC_VECTOR(1 DOWNTO 0) :="00";
CONSTANT S1 : STD_LOGIC_VECTOR(1 DOWNTO 0) :="01";
CONSTANT S2 : STD_LOGIC_VECTOR(1 DOWNTO 0) :="11";
CONSTANT S3 : STD_LOGIC_VECTOR(1 DOWNTO 0) :="10";
TYPE STATES IS (S0,S1,S2,S3);
SIGNAL CURRENT_STATE,NEXT_STATE:STATES;
BEGIN
 COM:PROCESS(SP,CURRENT_STATE)
  BEGIN
CASE CURRENT_STATE IS 
WHEN S0=>EN<='0';
  IF SP='1'THEN
     NEXT_STATE<=S1;
ELSE
     NEXT_STATE<=S0;
END IF;
WHEN S1=>EN<='1';
  IF SP='1'THEN
     NEXT_STATE<=S1;
ELSE
     NEXT_STATE<=S2;
END IF;
WHEN S2=>EN<='1';
  IF SP='1'THEN
     NEXT_STATE<=S3;
ELSE
     NEXT_STATE<=S2;
END IF;
WHEN S3=>EN<='0';
  IF SP='1'THEN
     NEXT_STATE<=S3;
ELSE
     NEXT_STATE<=S0;
END IF;
END CASE;
END PROCESS;
SYNCH:PROCESS(CLK)
BEGIN
IF CLR='1'THEN
CURRENT_STATE<=S0;
ELSIF CLK'EVENT AND CLK='1' THEN
CURRENT_STATE<=NEXT_STATE;
END IF;
END PROCESS;
END BEHAVE;