📄 mb.rpt
字号:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
p = Packed register
Device-Specific Information: c:\trangeaclock2\mb.rpt
mb
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 0/ 96( 0%) 0/ 48( 0%) 0/ 48( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
B: 0/ 96( 0%) 0/ 48( 0%) 0/ 48( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
C: 0/ 96( 0%) 0/ 48( 0%) 0/ 48( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
D: 0/ 96( 0%) 0/ 48( 0%) 0/ 48( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
E: 0/ 96( 0%) 1/ 48( 2%) 0/ 48( 0%) 0/16( 0%) 1/16( 6%) 0/16( 0%)
F: 27/ 96( 28%) 7/ 48( 14%) 37/ 48( 77%) 0/16( 0%) 8/16( 50%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
02: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
03: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
04: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
05: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
06: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
07: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
08: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
09: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
10: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
11: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 2/24( 8%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
13: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
14: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
15: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
16: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
17: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
18: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
19: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
20: 2/24( 8%) 1/4( 25%) 1/4( 25%) 0/4( 0%)
21: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
22: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
23: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
24: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: c:\trangeaclock2\mb.rpt
mb
** CLOCK SIGNALS **
Type Fan-out Name
INPUT 18 CLK
DFF 6 |CB10:U1|:2
DFF 6 |COUNT:U2|CDU6:U5|:4
DFF 6 |COUNT:U2|CDU10:UL|:4
DFF 6 |COUNT:U2|CDU10:U2|:4
DFF 6 |COUNT:U2|CDU10:U3|:4
DFF 6 |COUNT:U2|CDU10:U4|:4
DFF 6 |COUNT:U2|CDU10:U6|:4
DFF 5 |COUNT:U2|CDU6:U7|:4
Device-Specific Information: c:\trangeaclock2\mb.rpt
mb
** CLEAR SIGNALS **
Type Fan-out Name
INPUT 45 CLR
Device-Specific Information: c:\trangeaclock2\mb.rpt
mb
** EQUATIONS **
CLK : INPUT;
CLR : INPUT;
SP : INPUT;
-- Node name is 'CO'
-- Equation name is 'CO', type is output
CO = _LC4_B10;
-- Node name is 'EN'
-- Equation name is 'EN', type is output
EN = _LC8_F11;
-- Node name is 'LED0'
-- Equation name is 'LED0', type is output
LED0 = _LC4_F4;
-- Node name is 'LED1'
-- Equation name is 'LED1', type is output
LED1 = _LC5_F1;
-- Node name is 'LED2'
-- Equation name is 'LED2', type is output
LED2 = _LC7_F1;
-- Node name is 'LED3'
-- Equation name is 'LED3', type is output
LED3 = _LC4_F1;
-- Node name is 'LED4'
-- Equation name is 'LED4', type is output
LED4 = _LC2_F1;
-- Node name is 'LED5'
-- Equation name is 'LED5', type is output
LED5 = _LC1_F1;
-- Node name is 'LED6'
-- Equation name is 'LED6', type is output
LED6 = _LC8_F1;
-- Node name is 'OUTBCD0'
-- Equation name is 'OUTBCD0', type is output
OUTBCD0 = _LC5_F16;
-- Node name is 'OUTBCD1'
-- Equation name is 'OUTBCD1', type is output
OUTBCD1 = _LC2_F22;
-- Node name is 'OUTBCD2'
-- Equation name is 'OUTBCD2', type is output
OUTBCD2 = _LC8_F24;
-- Node name is 'OUTBCD3'
-- Equation name is 'OUTBCD3', type is output
OUTBCD3 = _LC2_F20;
-- Node name is 'SEG0'
-- Equation name is 'SEG0', type is output
SEG0 = _LC7_F21;
-- Node name is 'SEG1'
-- Equation name is 'SEG1', type is output
SEG1 = _LC2_F19;
-- Node name is 'SEG2'
-- Equation name is 'SEG2', type is output
SEG2 = _LC5_F11;
-- Node name is '|BCD7:U4|:135'
-- Equation name is '_LC8_F1', type is buried
_LC8_F1 = LCELL( _EQ001);
_EQ001 = !_LC2_F20 & _LC5_F16 & _LC8_F24
# !_LC2_F20 & _LC2_F22
# _LC2_F20 & !_LC2_F22 & !_LC8_F24
# !_LC2_F20 & !_LC5_F16 & !_LC8_F24;
-- Node name is '|BCD7:U4|:168'
-- Equation name is '_LC1_F1', type is buried
_LC1_F1 = LCELL( _EQ002);
_EQ002 = !_LC2_F20 & !_LC2_F22 & !_LC5_F16
# !_LC2_F22 & !_LC8_F24
# !_LC2_F20 & _LC2_F22 & _LC5_F16
# !_LC2_F20 & !_LC8_F24;
-- Node name is '|BCD7:U4|:201'
-- Equation name is '_LC2_F1', type is buried
_LC2_F1 = LCELL( _EQ003);
_EQ003 = !_LC2_F22 & !_LC8_F24
# !_LC2_F20 & _LC8_F24
# !_LC2_F20 & !_LC2_F22
# !_LC2_F20 & _LC5_F16;
-- Node name is '|BCD7:U4|:234'
-- Equation name is '_LC4_F1', type is buried
_LC4_F1 = LCELL( _EQ004);
_EQ004 = !_LC2_F20 & !_LC5_F16 & !_LC8_F24
# !_LC2_F20 & _LC2_F22 & !_LC8_F24
# !_LC2_F20 & !_LC2_F22 & _LC5_F16 & _LC8_F24
# !_LC2_F20 & _LC2_F22 & !_LC5_F16
# !_LC2_F22 & !_LC5_F16 & !_LC8_F24
# _LC2_F20 & !_LC2_F22 & !_LC8_F24;
-- Node name is '|BCD7:U4|:267'
-- Equation name is '_LC7_F1', type is buried
_LC7_F1 = LCELL( _EQ005);
_EQ005 = !_LC2_F20 & !_LC5_F16 & !_LC8_F24
# !_LC2_F22 & !_LC5_F16 & !_LC8_F24
# !_LC2_F20 & _LC2_F22 & !_LC5_F16;
-- Node name is '|BCD7:U4|:300'
-- Equation name is '_LC5_F1', type is buried
_LC5_F1 = LCELL( _EQ006);
_EQ006 = !_LC2_F20 & !_LC2_F22 & !_LC5_F16
# !_LC2_F20 & !_LC2_F22 & _LC8_F24
# !_LC2_F20 & !_LC5_F16 & _LC8_F24
# !_LC2_F22 & !_LC5_F16 & !_LC8_F24
# _LC2_F20 & !_LC2_F22 & !_LC8_F24;
-- Node name is '|BCD7:U4|:335'
-- Equation name is '_LC4_F4', type is buried
_LC4_F4 = LCELL( _EQ007);
_EQ007 = !_LC2_F20 & _LC2_F22 & !_LC8_F24
# !_LC2_F20 & !_LC2_F22 & _LC8_F24
# !_LC2_F20 & _LC2_F22 & !_LC5_F16
# _LC2_F20 & !_LC2_F22 & !_LC8_F24;
-- Node name is '|CB10:U1|:7' = '|CB10:U1|COUNT0'
-- Equation name is '_LC5_B10', type is buried
_LC5_B10 = DFFE(!_LC5_B10, GLOBAL( CLK), VCC, VCC, VCC);
-- Node name is '|CB10:U1|:6' = '|CB10:U1|COUNT1'
-- Equation name is '_LC3_B10', type is buried
_LC3_B10 = DFFE( _EQ008, GLOBAL( CLK), VCC, VCC, VCC);
_EQ008 = _LC3_B10 & !_LC5_B10
# _LC2_B10 & !_LC3_B10 & _LC5_B10
# !_LC1_B10 & !_LC3_B10 & _LC5_B10;
-- Node name is '|CB10:U1|:5' = '|CB10:U1|COUNT2'
-- Equation name is '_LC2_B10', type is buried
_LC2_B10 = DFFE( _EQ009, GLOBAL( CLK), VCC, VCC, VCC);
_EQ009 = _LC2_B10 & !_LC5_B10
# !_LC2_B10 & _LC3_B10 & _LC5_B10
# _LC2_B10 & !_LC3_B10;
-- Node name is '|CB10:U1|:4' = '|CB10:U1|COUNT3'
-- Equation name is '_LC1_B10', type is buried
_LC1_B10 = DFFE( _EQ010, GLOBAL( CLK), VCC, VCC, VCC);
_EQ010 = _LC1_B10 & !_LC5_B10
# !_LC1_B10 & _LC2_B10 & _LC3_B10 & _LC5_B10
# _LC1_B10 & !_LC2_B10 & _LC3_B10
# _LC1_B10 & _LC2_B10 & !_LC3_B10;
-- Node name is '|CB10:U1|:2'
-- Equation name is '_LC4_B10', type is buried
_LC4_B10 = DFFE( _EQ011, GLOBAL( CLK), VCC, VCC, VCC);
_EQ011 = _LC1_B10 & !_LC2_B10 & !_LC3_B10 & _LC5_B10;
-- Node name is '|COUNT:U2|CDU6:U5|LPM_ADD_SUB:81|addcore:adder|:55' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC6_F18', type is buried
_LC6_F18 = LCELL( _EQ012);
_EQ012 = _LC1_F18 & _LC5_F18;
-- Node name is '|COUNT:U2|CDU6:U5|LPM_ADD_SUB:81|addcore:adder|:59' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC7_F18', type is buried
_LC7_F18 = LCELL( _EQ013);
_EQ013 = _LC1_F18 & _LC3_F18 & _LC5_F18;
-- Node name is '|COUNT:U2|CDU6:U5|:13' = '|COUNT:U2|CDU6:U5|SCOUNT60'
-- Equation name is '_LC5_F18', type is buried
_LC5_F18 = DFFE( _EQ014, _LC4_F14, !CLR, VCC, VCC);
_EQ014 = _LC5_F18 & !_LC8_F11
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