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-- MAX+plus II Compiler Fit File
-- Version 10.2 07/10/2002
-- Compiled: 12/29/2008 16:02:46
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
CHIP "count"
BEGIN
DEVICE = "EPF10K10LC84-3";
"CLK" : INPUT_PIN = 1 ;
"CLR" : INPUT_PIN = 2 ;
"EN" : INPUT_PIN = 42 ;
"HOUR0" : OUTPUT_PIN = 66 ;
"HOUR1" : OUTPUT_PIN = 6 ;
"HOUR2" : OUTPUT_PIN = 22 ;
"HOUR3" : OUTPUT_PIN = 64 ;
"M_1MIN0" : OUTPUT_PIN = 25 ;
"M_1MIN1" : OUTPUT_PIN = 21 ;
"M_1MIN2" : OUTPUT_PIN = 9 ;
"M_1MIN3" : OUTPUT_PIN = 65 ;
"M_10MIN0" : OUTPUT_PIN = 67 ;
"M_10MIN1" : OUTPUT_PIN = 23 ;
"M_10MIN2" : OUTPUT_PIN = 5 ;
"M_10MIN3" : OUTPUT_PIN = 24 ;
"S_1MS0" : OUTPUT_PIN = 72 ;
"S_1MS1" : OUTPUT_PIN = 69 ;
"S_1MS2" : OUTPUT_PIN = 71 ;
"S_1MS3" : OUTPUT_PIN = 73 ;
"S_1S0" : OUTPUT_PIN = 35 ;
"S_1S1" : OUTPUT_PIN = 29 ;
"S_1S2" : OUTPUT_PIN = 30 ;
"S_1S3" : OUTPUT_PIN = 28 ;
"S_10MS0" : OUTPUT_PIN = 59 ;
"S_10MS1" : OUTPUT_PIN = 61 ;
"S_10MS2" : OUTPUT_PIN = 58 ;
"S_10MS3" : OUTPUT_PIN = 79 ;
"S_10S0" : OUTPUT_PIN = 19 ;
"S_10S1" : OUTPUT_PIN = 17 ;
"S_10S2" : OUTPUT_PIN = 18 ;
"S_10S3" : OUTPUT_PIN = 16 ;
"S_100MS0" : OUTPUT_PIN = 27 ;
"S_100MS1" : OUTPUT_PIN = 83 ;
"S_100MS2" : OUTPUT_PIN = 47 ;
"S_100MS3" : OUTPUT_PIN = 60 ;
"|CDU6:U5|LPM_ADD_SUB:81|addcore:adder|:59" : LOCATION = LC6_A1 ;
"|CDU6:U5|LPM_ADD_SUB:81|addcore:adder|:68" : LOCATION = LC4_A1 ;
"|CDU6:U5|:4" : LOCATION = LC4_B2 ;
"|CDU6:U5|:10" : LOCATION = LC1_A1 ; -- |CDU6:U5|SCOUNT63
"|CDU6:U5|:11" : LOCATION = LC5_A1 ; -- |CDU6:U5|SCOUNT62
"|CDU6:U5|:12" : LOCATION = LC3_A1 ; -- |CDU6:U5|SCOUNT61
"|CDU6:U5|:13" : LOCATION = LC7_A1 ; -- |CDU6:U5|SCOUNT60
"|CDU6:U5|:54" : LOCATION = LC2_A1 ;
"|CDU6:U7|LPM_ADD_SUB:81|addcore:adder|:59" : LOCATION = LC8_B5 ;
"|CDU6:U7|LPM_ADD_SUB:81|addcore:adder|:68" : LOCATION = LC7_B5 ;
"|CDU6:U7|:4" : LOCATION = LC4_B4 ;
"|CDU6:U7|:10" : LOCATION = LC6_B5 ; -- |CDU6:U7|SCOUNT63
"|CDU6:U7|:11" : LOCATION = LC5_B5 ; -- |CDU6:U7|SCOUNT62
"|CDU6:U7|:12" : LOCATION = LC4_B5 ; -- |CDU6:U7|SCOUNT61
"|CDU6:U7|:13" : LOCATION = LC1_B5 ; -- |CDU6:U7|SCOUNT60
"|CDU6:U7|:54" : LOCATION = LC3_B5 ;
"|CDU10:UL|LPM_ADD_SUB:82|addcore:adder|:59" : LOCATION = LC6_A23;
"|CDU10:UL|LPM_ADD_SUB:82|addcore:adder|:68" : LOCATION = LC2_A23;
"|CDU10:UL|:4" : LOCATION = LC1_C24;
"|CDU10:UL|:10" : LOCATION = LC1_A23; -- |CDU10:UL|SCOUNT103
"|CDU10:UL|:11" : LOCATION = LC4_A23; -- |CDU10:UL|SCOUNT102
"|CDU10:UL|:12" : LOCATION = LC8_A23; -- |CDU10:UL|SCOUNT101
"|CDU10:UL|:13" : LOCATION = LC3_A23; -- |CDU10:UL|SCOUNT100
"|CDU10:UL|:54" : LOCATION = LC5_A23;
"|CDU10:U2|LPM_ADD_SUB:82|addcore:adder|:59" : LOCATION = LC5_C24;
"|CDU10:U2|LPM_ADD_SUB:82|addcore:adder|:68" : LOCATION = LC4_C24;
"|CDU10:U2|:4" : LOCATION = LC5_C14;
"|CDU10:U2|:10" : LOCATION = LC7_C24; -- |CDU10:U2|SCOUNT103
"|CDU10:U2|:11" : LOCATION = LC6_C24; -- |CDU10:U2|SCOUNT102
"|CDU10:U2|:12" : LOCATION = LC2_C24; -- |CDU10:U2|SCOUNT101
"|CDU10:U2|:13" : LOCATION = LC8_C24; -- |CDU10:U2|SCOUNT100
"|CDU10:U2|:54" : LOCATION = LC3_C24;
"|CDU10:U3|LPM_ADD_SUB:82|addcore:adder|:59" : LOCATION = LC7_C14;
"|CDU10:U3|LPM_ADD_SUB:82|addcore:adder|:68" : LOCATION = LC6_C14;
"|CDU10:U3|:4" : LOCATION = LC1_C6 ;
"|CDU10:U3|:10" : LOCATION = LC4_C14; -- |CDU10:U3|SCOUNT103
"|CDU10:U3|:11" : LOCATION = LC2_C14; -- |CDU10:U3|SCOUNT102
"|CDU10:U3|:12" : LOCATION = LC8_C14; -- |CDU10:U3|SCOUNT101
"|CDU10:U3|:13" : LOCATION = LC1_C14; -- |CDU10:U3|SCOUNT100
"|CDU10:U3|:54" : LOCATION = LC3_C14;
"|CDU10:U4|LPM_ADD_SUB:82|addcore:adder|:59" : LOCATION = LC8_C6 ;
"|CDU10:U4|LPM_ADD_SUB:82|addcore:adder|:68" : LOCATION = LC7_C6 ;
"|CDU10:U4|:4" : LOCATION = LC8_A1 ;
"|CDU10:U4|:10" : LOCATION = LC2_C6 ; -- |CDU10:U4|SCOUNT103
"|CDU10:U4|:11" : LOCATION = LC6_C6 ; -- |CDU10:U4|SCOUNT102
"|CDU10:U4|:12" : LOCATION = LC5_C6 ; -- |CDU10:U4|SCOUNT101
"|CDU10:U4|:13" : LOCATION = LC4_C6 ; -- |CDU10:U4|SCOUNT100
"|CDU10:U4|:54" : LOCATION = LC3_C6 ;
"|CDU10:U6|LPM_ADD_SUB:82|addcore:adder|:59" : LOCATION = LC8_B2 ;
"|CDU10:U6|LPM_ADD_SUB:82|addcore:adder|:68" : LOCATION = LC6_B2 ;
"|CDU10:U6|:4" : LOCATION = LC2_B5 ;
"|CDU10:U6|:10" : LOCATION = LC5_B2 ; -- |CDU10:U6|SCOUNT103
"|CDU10:U6|:11" : LOCATION = LC2_B2 ; -- |CDU10:U6|SCOUNT102
"|CDU10:U6|:12" : LOCATION = LC1_B2 ; -- |CDU10:U6|SCOUNT101
"|CDU10:U6|:13" : LOCATION = LC7_B2 ; -- |CDU10:U6|SCOUNT100
"|CDU10:U6|:54" : LOCATION = LC3_B2 ;
"|CDU10:U8|LPM_ADD_SUB:82|addcore:adder|:59" : LOCATION = LC8_B4 ;
"|CDU10:U8|LPM_ADD_SUB:82|addcore:adder|:68" : LOCATION = LC7_B4 ;
"|CDU10:U8|:10" : LOCATION = LC6_B4 ; -- |CDU10:U8|SCOUNT103
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