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📄 count.rpt

📁 数字秒表具有正及时倒计时功能包括一些设计要求和原资料
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-- Equation name is '_LC1_C14', type is buried 
_LC1_C14 = DFFE( _EQ035,  _LC5_C14, GLOBAL(!CLR),  VCC,  VCC);
  _EQ035 = !EN &  _LC1_C14
         #  EN & !_LC1_C14;

-- Node name is '|CDU10:U3|:12' = '|CDU10:U3|SCOUNT101' 
-- Equation name is '_LC8_C14', type is buried 
_LC8_C14 = DFFE( _EQ036,  _LC5_C14, GLOBAL(!CLR),  VCC,  VCC);
  _EQ036 = !_LC1_C14 & !_LC3_C14 &  _LC8_C14
         #  EN &  _LC1_C14 & !_LC3_C14 & !_LC8_C14
         # !EN &  _LC8_C14;

-- Node name is '|CDU10:U3|:11' = '|CDU10:U3|SCOUNT102' 
-- Equation name is '_LC2_C14', type is buried 
_LC2_C14 = DFFE( _EQ037,  _LC5_C14, GLOBAL(!CLR),  VCC,  VCC);
  _EQ037 =  EN & !_LC3_C14 &  _LC6_C14
         # !EN &  _LC2_C14;

-- Node name is '|CDU10:U3|:10' = '|CDU10:U3|SCOUNT103' 
-- Equation name is '_LC4_C14', type is buried 
_LC4_C14 = DFFE( _EQ038,  _LC5_C14, GLOBAL(!CLR),  VCC,  VCC);
  _EQ038 = !_LC3_C14 &  _LC4_C14 & !_LC7_C14
         #  EN & !_LC3_C14 & !_LC4_C14 &  _LC7_C14
         # !EN &  _LC4_C14;

-- Node name is '|CDU10:U3|:4' 
-- Equation name is '_LC1_C6', type is buried 
_LC1_C6  = DFFE( _EQ039,  _LC5_C14, GLOBAL(!CLR),  VCC,  VCC);
  _EQ039 =  EN &  _LC3_C14
         # !EN &  _LC1_C6;

-- Node name is '|CDU10:U3|:54' 
-- Equation name is '_LC3_C14', type is buried 
_LC3_C14 = LCELL( _EQ040);
  _EQ040 =  _LC1_C14 & !_LC2_C14 &  _LC4_C14 & !_LC8_C14;

-- Node name is '|CDU10:U4|LPM_ADD_SUB:82|addcore:adder|:59' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC8_C6', type is buried 
_LC8_C6  = LCELL( _EQ041);
  _EQ041 =  _LC4_C6 &  _LC5_C6 &  _LC6_C6;

-- Node name is '|CDU10:U4|LPM_ADD_SUB:82|addcore:adder|:68' from file "addcore.tdf" line 316, column 45
-- Equation name is '_LC7_C6', type is buried 
_LC7_C6  = LCELL( _EQ042);
  _EQ042 = !_LC5_C6 &  _LC6_C6
         # !_LC4_C6 &  _LC6_C6
         #  _LC4_C6 &  _LC5_C6 & !_LC6_C6;

-- Node name is '|CDU10:U4|:13' = '|CDU10:U4|SCOUNT100' 
-- Equation name is '_LC4_C6', type is buried 
_LC4_C6  = DFFE( _EQ043,  _LC1_C6, GLOBAL(!CLR),  VCC,  VCC);
  _EQ043 = !EN &  _LC4_C6
         #  EN & !_LC4_C6;

-- Node name is '|CDU10:U4|:12' = '|CDU10:U4|SCOUNT101' 
-- Equation name is '_LC5_C6', type is buried 
_LC5_C6  = DFFE( _EQ044,  _LC1_C6, GLOBAL(!CLR),  VCC,  VCC);
  _EQ044 = !_LC3_C6 & !_LC4_C6 &  _LC5_C6
         #  EN & !_LC3_C6 &  _LC4_C6 & !_LC5_C6
         # !EN &  _LC5_C6;

-- Node name is '|CDU10:U4|:11' = '|CDU10:U4|SCOUNT102' 
-- Equation name is '_LC6_C6', type is buried 
_LC6_C6  = DFFE( _EQ045,  _LC1_C6, GLOBAL(!CLR),  VCC,  VCC);
  _EQ045 =  EN & !_LC3_C6 &  _LC7_C6
         # !EN &  _LC6_C6;

-- Node name is '|CDU10:U4|:10' = '|CDU10:U4|SCOUNT103' 
-- Equation name is '_LC2_C6', type is buried 
_LC2_C6  = DFFE( _EQ046,  _LC1_C6, GLOBAL(!CLR),  VCC,  VCC);
  _EQ046 =  _LC2_C6 & !_LC3_C6 & !_LC8_C6
         #  EN & !_LC2_C6 & !_LC3_C6 &  _LC8_C6
         # !EN &  _LC2_C6;

-- Node name is '|CDU10:U4|:4' 
-- Equation name is '_LC8_A1', type is buried 
_LC8_A1  = DFFE( _EQ047,  _LC1_C6, GLOBAL(!CLR),  VCC,  VCC);
  _EQ047 =  EN &  _LC3_C6
         # !EN &  _LC8_A1;

-- Node name is '|CDU10:U4|:54' 
-- Equation name is '_LC3_C6', type is buried 
_LC3_C6  = LCELL( _EQ048);
  _EQ048 =  _LC2_C6 &  _LC4_C6 & !_LC5_C6 & !_LC6_C6;

-- Node name is '|CDU10:U6|LPM_ADD_SUB:82|addcore:adder|:59' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC8_B2', type is buried 
_LC8_B2  = LCELL( _EQ049);
  _EQ049 =  _LC1_B2 &  _LC2_B2 &  _LC7_B2;

-- Node name is '|CDU10:U6|LPM_ADD_SUB:82|addcore:adder|:68' from file "addcore.tdf" line 316, column 45
-- Equation name is '_LC6_B2', type is buried 
_LC6_B2  = LCELL( _EQ050);
  _EQ050 = !_LC1_B2 &  _LC2_B2
         #  _LC2_B2 & !_LC7_B2
         #  _LC1_B2 & !_LC2_B2 &  _LC7_B2;

-- Node name is '|CDU10:U6|:13' = '|CDU10:U6|SCOUNT100' 
-- Equation name is '_LC7_B2', type is buried 
_LC7_B2  = DFFE( _EQ051,  _LC4_B2, GLOBAL(!CLR),  VCC,  VCC);
  _EQ051 = !EN &  _LC7_B2
         #  EN & !_LC7_B2;

-- Node name is '|CDU10:U6|:12' = '|CDU10:U6|SCOUNT101' 
-- Equation name is '_LC1_B2', type is buried 
_LC1_B2  = DFFE( _EQ052,  _LC4_B2, GLOBAL(!CLR),  VCC,  VCC);
  _EQ052 =  _LC1_B2 & !_LC3_B2 & !_LC7_B2
         #  EN & !_LC1_B2 & !_LC3_B2 &  _LC7_B2
         # !EN &  _LC1_B2;

-- Node name is '|CDU10:U6|:11' = '|CDU10:U6|SCOUNT102' 
-- Equation name is '_LC2_B2', type is buried 
_LC2_B2  = DFFE( _EQ053,  _LC4_B2, GLOBAL(!CLR),  VCC,  VCC);
  _EQ053 =  EN & !_LC3_B2 &  _LC6_B2
         # !EN &  _LC2_B2;

-- Node name is '|CDU10:U6|:10' = '|CDU10:U6|SCOUNT103' 
-- Equation name is '_LC5_B2', type is buried 
_LC5_B2  = DFFE( _EQ054,  _LC4_B2, GLOBAL(!CLR),  VCC,  VCC);
  _EQ054 = !_LC3_B2 &  _LC5_B2 & !_LC8_B2
         #  EN & !_LC3_B2 & !_LC5_B2 &  _LC8_B2
         # !EN &  _LC5_B2;

-- Node name is '|CDU10:U6|:4' 
-- Equation name is '_LC2_B5', type is buried 
_LC2_B5  = DFFE( _EQ055,  _LC4_B2, GLOBAL(!CLR),  VCC,  VCC);
  _EQ055 =  EN &  _LC3_B2
         # !EN &  _LC2_B5;

-- Node name is '|CDU10:U6|:54' 
-- Equation name is '_LC3_B2', type is buried 
_LC3_B2  = LCELL( _EQ056);
  _EQ056 = !_LC1_B2 & !_LC2_B2 &  _LC5_B2 &  _LC7_B2;

-- Node name is '|CDU10:U8|LPM_ADD_SUB:82|addcore:adder|:59' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC8_B4', type is buried 
_LC8_B4  = LCELL( _EQ057);
  _EQ057 =  _LC1_B4 &  _LC2_B4 &  _LC3_B4;

-- Node name is '|CDU10:U8|LPM_ADD_SUB:82|addcore:adder|:68' from file "addcore.tdf" line 316, column 45
-- Equation name is '_LC7_B4', type is buried 
_LC7_B4  = LCELL( _EQ058);
  _EQ058 = !_LC1_B4 &  _LC2_B4
         #  _LC2_B4 & !_LC3_B4
         #  _LC1_B4 & !_LC2_B4 &  _LC3_B4;

-- Node name is '|CDU10:U8|:13' = '|CDU10:U8|SCOUNT100' 
-- Equation name is '_LC3_B4', type is buried 
_LC3_B4  = DFFE( _EQ059,  _LC4_B4, GLOBAL(!CLR),  VCC,  VCC);
  _EQ059 = !EN &  _LC3_B4
         #  EN & !_LC3_B4;

-- Node name is '|CDU10:U8|:12' = '|CDU10:U8|SCOUNT101' 
-- Equation name is '_LC1_B4', type is buried 
_LC1_B4  = DFFE( _EQ060,  _LC4_B4, GLOBAL(!CLR),  VCC,  VCC);
  _EQ060 =  _LC1_B4 & !_LC3_B4 & !_LC5_B4
         #  EN & !_LC1_B4 &  _LC3_B4 & !_LC5_B4
         # !EN &  _LC1_B4;

-- Node name is '|CDU10:U8|:11' = '|CDU10:U8|SCOUNT102' 
-- Equation name is '_LC2_B4', type is buried 
_LC2_B4  = DFFE( _EQ061,  _LC4_B4, GLOBAL(!CLR),  VCC,  VCC);
  _EQ061 =  EN & !_LC5_B4 &  _LC7_B4
         # !EN &  _LC2_B4;

-- Node name is '|CDU10:U8|:10' = '|CDU10:U8|SCOUNT103' 
-- Equation name is '_LC6_B4', type is buried 
_LC6_B4  = DFFE( _EQ062,  _LC4_B4, GLOBAL(!CLR),  VCC,  VCC);
  _EQ062 = !_LC5_B4 &  _LC6_B4 & !_LC8_B4
         #  EN & !_LC5_B4 & !_LC6_B4 &  _LC8_B4
         # !EN &  _LC6_B4;

-- Node name is '|CDU10:U8|:54' 
-- Equation name is '_LC5_B4', type is buried 
!_LC5_B4 = _LC5_B4~NOT;
_LC5_B4~NOT = LCELL( _EQ063);
  _EQ063 =  _LC2_B4
         #  _LC1_B4
         # !_LC6_B4
         # !_LC3_B4;



Project Information                                           c:\new\count.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Multi-Level

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'FLEX10K' family

      CARRY_CHAIN                         = ignore
      CARRY_CHAIN_LENGTH                  = 32
      CASCADE_CHAIN                       = ignore
      CASCADE_CHAIN_LENGTH                = 2
      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SUBFACTOR_EXTRACTION                = on
      IGNORE_SOFT_BUFFERS                 = on
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic Fast I/O                  = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = off

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Use Quartus Fitter                        = on
Smart Recompile                           = off
Total Recompile                           = off

Interfaces Menu Commands
------------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:00
   Database Builder                       00:00:00
   Logic Synthesizer                      00:00:00
   Partitioner                            00:00:00
   Fitter                                 00:00:01
   Timing SNF Extractor                   00:00:00
   Assembler                              00:00:00
   --------------------------             --------
   Total Time                             00:00:01


Memory Allocated
-----------------

Peak memory allocated during compilation  = 20,220K

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