testapp_memory_linkscr

source codes jpeg_vhdl

_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x400;

/* Define all the memory regions in the system */
MEMORY
{
ilmb_cntlr : ORIGIN = 0x00000000, LENGTH = 0x1fff
}

/*
* Specify the default entry point to the program
*/
ENTRY(_start)

/*
* Define the sections, and where they are mapped in memory
*/
SECTIONS
{

  .text : {
    _ftext = .;
    *(.text)
    *(.text.*)
    *(.gnu.linkonce.t*)
    _etext = .;
  } > ilmb_cntlr

  .rodata : {
    _frodata = .;
    *(.rodata)
    *(.rodata.*)
    *(.gnu.linkonce.r*)
    _erodata = .;
  } > ilmb_cntlr

  /* Alignments by 8 to ensure that _SDA2_BASE_ on a word boundary */
  .sdata2 : {
    . = ALIGN(8);
    _sdata2_start = .;
    *(.sdata2)
    . = ALIGN(8);
    _sdata2_end = .;
  } > ilmb_cntlr
  _sdata2_size = _sdata2_end - _sdata2_start;
  PROVIDE (_SDA2_BASE_ =  _sdata2_start + (_sdata2_size / 2 ));

  .data : {
    . = ALIGN(4);
    _fdata = .;
    *(.data)
    *(.data.*)
    *(.gnu.linkonce.d*)
    _edata = .;
  } > ilmb_cntlr

  .eh_frame : {
    *(.eh_frame)
  } > ilmb_cntlr

  /* Alignments by 8 to ensure that _SDA_BASE_ on a word boundary */
  /* Note that .sdata and .sbss must be contiguous */

  .sdata : { 
    . = ALIGN(8);
    _ssro = .;
    *(.sdata)
  } > ilmb_cntlr
  .sbss : { 
    . = ALIGN(4); 
    PROVIDE (__sbss_start = .);  
    *(.sbss)
    . = ALIGN(8);
    _essro = .;
  } > ilmb_cntlr
  PROVIDE (__sbss_end = _essro);
  _ssro_size = _essro - _ssro;
  PROVIDE (_SDA_BASE_ = _ssro + (_ssro_size / 2 ));

  .bss : {
    . = ALIGN(4);
    PROVIDE (__bss_start = .);
    *(.bss)
    *(COMMON)
    . = ALIGN(4);  
    PROVIDE (__bss_end = .);
  } > ilmb_cntlr

  .bss_stack : {
     . = ALIGN(8);
     _heap = .;
     _heap_start = _heap;
     . += _STACK_SIZE;
     . = ALIGN(8);
     _stack = .;
     __stack = _stack;
  } > ilmb_cntlr
}