📄 myled8.map.rpt
字号:
; |myled8 ; 26 (14) ; 15 ; 0 ; 9 ; 11 (11) ; 1 (1) ; 14 (2) ; 12 (0) ; |myled8 ;
; |lpm_counter:\a1:a[0]_rtl_0| ; 12 (0) ; 12 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 12 (0) ; 12 (0) ; |myled8|lpm_counter:\a1:a[0]_rtl_0 ;
; |alt_counter_f10ke:wysi_counter| ; 12 (12) ; 12 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 12 (12) ; 12 (12) ; |myled8|lpm_counter:\a1:a[0]_rtl_0|alt_counter_f10ke:wysi_counter ;
+----------------------------------------+-------------+--------------+-------------+------+--------------+-------------------+------------------+-----------------+-------------------------------------------------------------------+
+--------------------------------+
; Analysis & Synthesis Equations ;
+--------------------------------+
The equations can be found in C:/Documents and Settings/Administrator/桌面/qml2/myled8.map.eqn.
+--------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read ;
+----------------------------------+-----------------+---------------------------------------------------------------------+
; File Name with User-Entered Path ; Used in Netlist ; File Name with Absolute Path ;
+----------------------------------+-----------------+---------------------------------------------------------------------+
; myled8.vhd ; yes ; C:/Documents and Settings/Administrator/桌面/qml2/myled8.vhd ;
; lpm_counter.tdf ; yes ; c:/altera/quartus42/libraries/megafunctions/lpm_counter.tdf ;
; lpm_constant.inc ; yes ; c:/altera/quartus42/libraries/megafunctions/lpm_constant.inc ;
; lpm_decode.inc ; yes ; c:/altera/quartus42/libraries/megafunctions/lpm_decode.inc ;
; lpm_add_sub.inc ; yes ; c:/altera/quartus42/libraries/megafunctions/lpm_add_sub.inc ;
; cmpconst.inc ; yes ; c:/altera/quartus42/libraries/megafunctions/cmpconst.inc ;
; lpm_compare.inc ; yes ; c:/altera/quartus42/libraries/megafunctions/lpm_compare.inc ;
; lpm_counter.inc ; yes ; c:/altera/quartus42/libraries/megafunctions/lpm_counter.inc ;
; dffeea.inc ; yes ; c:/altera/quartus42/libraries/megafunctions/dffeea.inc ;
; alt_synch_counter.inc ; yes ; c:/altera/quartus42/libraries/megafunctions/alt_synch_counter.inc ;
; alt_synch_counter_f.inc ; yes ; c:/altera/quartus42/libraries/megafunctions/alt_synch_counter_f.inc ;
; alt_counter_f10ke.inc ; yes ; c:/altera/quartus42/libraries/megafunctions/alt_counter_f10ke.inc ;
; alt_counter_stratix.inc ; yes ; c:/altera/quartus42/libraries/megafunctions/alt_counter_stratix.inc ;
; aglobal42.inc ; yes ; c:/altera/quartus42/libraries/megafunctions/aglobal42.inc ;
; alt_counter_f10ke.tdf ; yes ; c:/altera/quartus42/libraries/megafunctions/alt_counter_f10ke.tdf ;
; flex10ke_lcell.inc ; yes ; c:/altera/quartus42/libraries/megafunctions/flex10ke_lcell.inc ;
+----------------------------------+-----------------+---------------------------------------------------------------------+
+---------------------------------------------+
; Analysis & Synthesis Resource Usage Summary ;
+-----------------------------------+---------+
; Resource ; Usage ;
+-----------------------------------+---------+
; Logic cells ; 26 ;
; Total combinational functions ; 25 ;
; Total 4-input functions ; 2 ;
; Total 3-input functions ; 9 ;
; Total 2-input functions ; 1 ;
; Total 1-input functions ; 13 ;
; Total 0-input functions ; 0 ;
; Combinational cells for routing ; 0 ;
; Total registers ; 15 ;
; Total logic cells in carry chains ; 12 ;
; I/O pins ; 9 ;
; Maximum fan-out node ; clk ;
; Maximum fan-out ; 15 ;
; Total fan-out ; 88 ;
; Average fan-out ; 2.51 ;
+-----------------------------------+---------+
+----------------------------------------------------------------+
; WYSIWYG Cells ;
+--------------------------------------------------------+-------+
; Statistic ; Value ;
+--------------------------------------------------------+-------+
; Number of WYSIWYG cells ; 12 ;
; Number of synthesis-generated cells ; 14 ;
; Number of WYSIWYG LUTs ; 12 ;
; Number of synthesis-generated LUTs ; 13 ;
; Number of WYSIWYG registers ; 12 ;
; Number of synthesis-generated registers ; 3 ;
; Number of cells with combinational logic only ; 11 ;
; Number of cells with registers only ; 1 ;
; Number of cells with combinational logic and registers ; 14 ;
+--------------------------------------------------------+-------+
+------------------------------------------------------+
; General Register Statistics ;
+----------------------------------------------+-------+
; Statistic ; Value ;
+----------------------------------------------+-------+
; Total registers ; 15 ;
; Number of registers using Synchronous Clear ; 12 ;
; Number of registers using Synchronous Load ; 0 ;
; Number of registers using Asynchronous Clear ; 0 ;
; Number of registers using Asynchronous Load ; 0 ;
; Number of registers using Clock Enable ; 3 ;
; Number of registers using Output Enable ; 0 ;
; Number of registers using Preset ; 0 ;
+----------------------------------------------+-------+
+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 4.2 Build 157 12/07/2004 SJ Full Version
Info: Processing started: Mon Mar 23 15:50:09 2009
Info: Command: quartus_map --import_settings_files=on --export_settings_files=off myled8 -c myled8
Info: Found 2 design units, including 1 entities, in source file myled8.vhd
Info: Found design unit 1: myled8-bhv
Info: Found entity 1: myled8
Info: Inferred 1 megafunctions from design logic
Info: Inferred lpm_counter megafunction (LPM_WIDTH=12) from the following logic: "\a1:a[0]~0"
Info: Found 1 design units, including 1 entities, in source file ../../../../altera/quartus42/libraries/megafunctions/lpm_counter.tdf
Info: Found entity 1: lpm_counter
Info: Found 1 design units, including 1 entities, in source file ../../../../altera/quartus42/libraries/megafunctions/alt_counter_f10ke.tdf
Info: Found entity 1: alt_counter_f10ke
Info: Implemented 35 device resources after synthesis - the final resource count might be different
Info: Implemented 1 input pins
Info: Implemented 8 output pins
Info: Implemented 26 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings
Info: Processing ended: Mon Mar 23 15:50:10 2009
Info: Elapsed time: 00:00:02
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