baud_gen.stx

来自「RS232的UART编程」· STX 代码 · 共 25 行

Release 8.2.03i - xst I.34
Copyright (c) 1995-2006 Xilinx, Inc.  All rights reserved.
--> Parameter TMPDIR set to ./xst/projnav.tmp
CPU : 0.00 / 0.31 s | Elapsed : 0.00 / 0.00 s
 
--> 
=========================================================================
*                          HDL Compilation                              *
=========================================================================
Compiling verilog file "baud_gen.v" in library work
Module <baud_gen> compiled
No errors in compilation
Analysis of file <"baud_gen.prj"> succeeded.
 
CPU : 0.03 / 0.34 s | Elapsed : 0.00 / 0.00 s
 
--> 

Total memory usage is 109480 kilobytes

Number of errors   :    0 (   0 filtered)
Number of warnings :    0 (   0 filtered)
Number of infos    :    0 (   0 filtered)