fenpinqi4.vhd

来自「红外4PPM解码的源程序」· VHDL 代码 · 共 26 行

LIBRARY  ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity  fenpinqi4  is
port(inclk : in  std_logic;
     outclk: out std_logic );
end fenpinqi4; 
architecture aaa of fenpinqi4 is
signal counter :std_logic;
begin 
process(inclk)
variable counter1:integer range 0 to 15;
constant md :integer:=2;
begin
if (inclk'event and inclk='1')then
if(counter1=md)then
counter1:= 0 ;
counter<=not counter;
outclk<=counter;
end if;
counter1:=counter1+1;
end if;
end  process;
end  aaa;