fenpinqi2.vhd

红外4PPM解码的源程序

LIBRARY  ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity  fenpinqi2  is
port(inclk : in  std_logic;
     outclk: out std_logic );
end fenpinqi2; 
architecture aaa of fenpinqi2 is
signal counter :std_logic;
begin 
process(inclk)
variable counter1:integer range 0 to 15;
constant md :integer:=1;
begin
if (inclk'event and inclk='1')then
if(counter1=md)then
counter1:= 0 ;
counter<=not counter;
outclk<=counter;
end if;
counter1:=counter1+1;
end if;
end  process;
end  aaa;