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📄 usb_new_pvci_cntrl_ent.vhdl

📁 usb rtl code, to fpga or asic
💻 VHDL
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--------------------------------------------------------------------------------
-- P H I L I P S  C O M P A N Y  R E S T R I C T E D
--                                         
--  Copyright (c) 1998.                    
--
--  Philips Electronics N.V.
--
--  Philips Semiconductors
--  Interconnectivity and Processor Peripherals Group
--  Bangalore,India
--  All rights reserved. Reproduction in whole or in part is prohibited
--  without the written permission of the copyright owner.
--
--------------------------------------------------------------------------------
--
--  File            : usb_new_pvci_cntrl_ent.vhdl 
--
--  Module          : PVCI CONTROLLER
--
--  Project         : VPB bus interface to USB1.1 device (USBFS22)
--
--  Author          :              
--
--  Description     : The entity of  PVCI  block
--
--  Contact address : sanjeev@blr.sc.philips.com
--
----------------------------------------------------------------------------------

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

library work;
use work.PCK_GENERAL.all;

library work;
use work.PCK_APB.all;

entity PVCI_CNTRL is
   port(
         -- Interface to APB_WRAPPER module
                     
         clk:                 in   one_bit;          -- PVCI clock
         pvci_reset_n:        in   one_bit;          -- Reset
         req:                 in   one_bit;          -- Request
         address:             in   byte;             -- Address
         rnw:                 in   one_bit;          -- '0' write, '1' read
         w_data:              in   four_bytes;       -- Write data
         gnt:                 out  one_bit;          -- Grant
         r_data:              out  four_bytes;       -- Read data
         error:               out  one_bit;          -- Error 
         
         -- Interface to USB_CONTROLLER module
        
         Rd_data:             in   four_bytes;       -- Data from PVCI
         Write_Cmd_Code:      out  one_bit;          -- Write command code
         Read_Cmd_Data:       out  one_bit;          -- Read command data
         Read_Receive_Data:   out  one_bit;          -- Read recive data
         Write_Transmt_Data:  out  one_bit;          -- Write transmit data
         Write_USB_Cntrl:     out  one_bit;          -- Write USB control register
         Read_USB_Cntrl:      out  one_bit;          -- Read USB control register
         Read_RxPkt_Lngth :   out  one_bit;          -- Read Rx packet length
         Write_TxPkt_Lngth:   out  one_bit;          -- Write Tx packet length
         Read_Intr_Status:    out  one_bit;          -- Read interrupt status register
         Read_Intr_enable:    out  one_bit;          -- Read interrupt enable register
         Write_Intr_Enable:   out  one_bit;          -- Write interrupt enable register
         Write_Intr_Clear:    out  one_bit;          -- Write interrupt clear register
         Write_Intr_Set :     out  one_bit;          -- Write interrupt set register
         Read_TxPkt_Lngth:    out  one_bit;          -- Read Tx packet length
         Wr_data:             out  four_bytes;       -- Data to PVCI
         Write_Fiq_Sel:       out  one_bit           -- Write Fiq Sel register
         );
 end PVCI_CNTRL;    

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