📄 drv_led.ms
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.file "..\src\Drv_led.c"
; GNU C 2.7.2 [AL 1.1, MM 40] RISC NEWS-OS compiled by CC
; Cc1 defaults:
; -mmemcpy
; Cc1 arguments (-G value = 0, Cpu = 3000, ISA = 1):
; -quiet -dumpbase -g -O -fno-builtin -o
gcc2_compiled.:
__gnu_compiled_c:
.code
.align 1
.def vInitLED, val vInitLED, scl 2, type 0x21, endef
.global vInitLED
.loc 21
.def ent, scl 101, type 0x0, endef
vInitLED:
; .frame %sp,4,$31 # vars= 0, regs= 1/0, args= 0, extra= 0
; .mask 0x80000000,-4
; .fmask 0x00000000,0
.loc 22
ext 0x0 ; xld.w %r11,0x000402d0 ; 262864
ext 0x100b
ld.w %r11,0x10
;.set volatile
ld.ub %r10,[%r11] ; xld.ub %r10,[%r11]
;.set novolatile
ext 0x3 ; xand %r10,%r10,0x000000f0
and %r10,0x30
;.set volatile
ld.b [%r11],%r10 ; xld.b [%r11],%r10
;.set novolatile
.loc 23
ext 0x0 ; xld.w %r11,0x000402d2 ; 262866
ext 0x100b
ld.w %r11,0x12
;.set volatile
ld.ub %r10,[%r11] ; xld.ub %r10,[%r11]
;.set novolatile
or %r10,0xf ; xoor %r10,%r10,0x0000000f
;.set volatile
ld.b [%r11],%r10 ; xld.b [%r11],%r10
;.set novolatile
.loc 24
ext 0x0 ; xld.w %r11,0x000402d1 ; 262865
ext 0x100b
ld.w %r11,0x11
;.set volatile
ld.ub %r10,[%r11] ; xld.ub %r10,[%r11]
;.set novolatile
ext 0x3 ; xand %r10,%r10,0x000000f0
and %r10,0x30
;.set volatile
ld.b [%r11],%r10 ; xld.b [%r11],%r10
;.set novolatile
.loc 25
ret
.def end, scl 111, type 0x0, endef
.align 1
.def vLEDOn, val vLEDOn, scl 2, type 0x21, endef
.global vLEDOn
.loc 28
.def ent, scl 101, type 0x0, endef
vLEDOn:
; .frame %sp,4,$31 # vars= 0, regs= 1/0, args= 0, extra= 0
; .mask 0x80000000,-4
; .fmask 0x00000000,0
.loc 29
ext 0x0 ; xld.w %r11,0x000402d1 ; 262865
ext 0x100b
ld.w %r11,0x11
;.set volatile
ld.ub %r10,[%r11] ; xld.ub %r10,[%r11]
;.set novolatile
or %r10,0xf ; xoor %r10,%r10,0x0000000f
;.set volatile
ld.b [%r11],%r10 ; xld.b [%r11],%r10
;.set novolatile
.loc 30
ret
.def end, scl 111, type 0x0, endef
.align 1
.def vLEDOff, val vLEDOff, scl 2, type 0x21, endef
.global vLEDOff
.loc 33
.def ent, scl 101, type 0x0, endef
vLEDOff:
; .frame %sp,4,$31 # vars= 0, regs= 1/0, args= 0, extra= 0
; .mask 0x80000000,-4
; .fmask 0x00000000,0
.loc 34
ext 0x0 ; xld.w %r11,0x000402d1 ; 262865
ext 0x100b
ld.w %r11,0x11
;.set volatile
ld.ub %r10,[%r11] ; xld.ub %r10,[%r11]
;.set novolatile
ext 0x3 ; xand %r10,%r10,0x000000f0
and %r10,0x30
;.set volatile
ld.b [%r11],%r10 ; xld.b [%r11],%r10
;.set novolatile
.loc 35
ret
.def end, scl 111, type 0x0, endef
.align 1
.def vSingleOn, val vSingleOn, scl 2, type 0x21, endef
.global vSingleOn
.loc 38
.def ent, scl 101, type 0x0, endef
vSingleOn:
; .frame %sp,4,$31 # vars= 0, regs= 1/0, args= 0, extra= 0
; .mask 0x80000000,-4
; .fmask 0x00000000,0
.def number, val 12, scl 17, type 0xc, endef
.loc 39
ld.ub %r12,%r12
cmp %r12,0x2 ; xcmp %r12,2
jreq __LX7 ; xjreq __L7
jrgt __LX12 ; xjrgt __L12
cmp %r12,0x1 ; xcmp %r12,1
jreq __LX6 ; xjreq __L6
jp __LX5 ; xjp __L5
__LX12: ; __L12:
cmp %r12,0x3 ; xcmp %r12,3
jreq __LX8 ; xjreq __L8
cmp %r12,0x4 ; xcmp %r12,4
jreq __LX9 ; xjreq __L9
jp __LX5 ; xjp __L5
__LX6: ; __L6:
.loc 42
ext 0x0 ; xld.w %r11,0x000402d1 ; 262865
ext 0x100b
ld.w %r11,0x11
;.set volatile
ld.ub %r10,[%r11] ; xld.ub %r10,[%r11]
;.set novolatile
or %r10,0x4 ; xoor %r10,%r10,0x00000004
.loc 43
jp __LX13 ; xjp __L13
__LX7: ; __L7:
.loc 45
ext 0x0 ; xld.w %r11,0x000402d1 ; 262865
ext 0x100b
ld.w %r11,0x11
;.set volatile
ld.ub %r10,[%r11] ; xld.ub %r10,[%r11]
;.set novolatile
or %r10,0x2 ; xoor %r10,%r10,0x00000002
.loc 46
jp __LX13 ; xjp __L13
__LX8: ; __L8:
.loc 48
ext 0x0 ; xld.w %r11,0x000402d1 ; 262865
ext 0x100b
ld.w %r11,0x11
;.set volatile
ld.ub %r10,[%r11] ; xld.ub %r10,[%r11]
;.set novolatile
or %r10,0x1 ; xoor %r10,%r10,0x00000001
.loc 49
jp __LX13 ; xjp __L13
__LX9: ; __L9:
.loc 51
ext 0x0 ; xld.w %r11,0x000402d1 ; 262865
ext 0x100b
ld.w %r11,0x11
;.set volatile
ld.ub %r10,[%r11] ; xld.ub %r10,[%r11]
;.set novolatile
or %r10,0x8 ; xoor %r10,%r10,0x00000008
__LX13: ; __L13:
;.set volatile
ld.b [%r11],%r10 ; xld.b [%r11],%r10
;.set novolatile
__LX5: ; __L5:
.loc 56
ret
.def end, scl 111, type 0x0, endef
.align 1
.def vSingleOff, val vSingleOff, scl 2, type 0x21, endef
.global vSingleOff
.loc 59
.def ent, scl 101, type 0x0, endef
vSingleOff:
; .frame %sp,4,$31 # vars= 0, regs= 1/0, args= 0, extra= 0
; .mask 0x80000000,-4
; .fmask 0x00000000,0
.def number, val 12, scl 17, type 0xc, endef
.loc 60
ld.ub %r12,%r12
cmp %r12,0x2 ; xcmp %r12,2
jreq __LX17 ; xjreq __L17
jrgt __LX22 ; xjrgt __L22
cmp %r12,0x1 ; xcmp %r12,1
jreq __LX16 ; xjreq __L16
jp __LX15 ; xjp __L15
__LX22: ; __L22:
cmp %r12,0x3 ; xcmp %r12,3
jreq __LX18 ; xjreq __L18
cmp %r12,0x4 ; xcmp %r12,4
jreq __LX19 ; xjreq __L19
jp __LX15 ; xjp __L15
__LX16: ; __L16:
.loc 63
ext 0x0 ; xld.w %r11,0x000402d1 ; 262865
ext 0x100b
ld.w %r11,0x11
;.set volatile
ld.ub %r10,[%r11] ; xld.ub %r10,[%r11]
;.set novolatile
ext 0x3 ; xand %r10,%r10,0x000000fb
and %r10,0x3b
.loc 64
jp __LX23 ; xjp __L23
__LX17: ; __L17:
.loc 66
ext 0x0 ; xld.w %r11,0x000402d1 ; 262865
ext 0x100b
ld.w %r11,0x11
;.set volatile
ld.ub %r10,[%r11] ; xld.ub %r10,[%r11]
;.set novolatile
ext 0x3 ; xand %r10,%r10,0x000000fd
and %r10,0x3d
.loc 67
jp __LX23 ; xjp __L23
__LX18: ; __L18:
.loc 69
ext 0x0 ; xld.w %r11,0x000402d1 ; 262865
ext 0x100b
ld.w %r11,0x11
;.set volatile
ld.ub %r10,[%r11] ; xld.ub %r10,[%r11]
;.set novolatile
ext 0x3 ; xand %r10,%r10,0x000000fe
and %r10,0x3e
.loc 70
jp __LX23 ; xjp __L23
__LX19: ; __L19:
.loc 72
ext 0x0 ; xld.w %r11,0x000402d1 ; 262865
ext 0x100b
ld.w %r11,0x11
;.set volatile
ld.ub %r10,[%r11] ; xld.ub %r10,[%r11]
;.set novolatile
ext 0x3 ; xand %r10,%r10,0x000000f7
and %r10,0x37
__LX23: ; __L23:
;.set volatile
ld.b [%r11],%r10 ; xld.b [%r11],%r10
;.set novolatile
__LX15: ; __L15:
.loc 77
ret
.def end, scl 111, type 0x0, endef
.endfile
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