📄 validatebaudrate.lst
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__start:
__text_start:
2D E5CF LDI R28,0x5F
2E E0D4 LDI R29,4
2F BFCD OUT 0x3D,R28
30 BFDE OUT 0x3E,R29
31 51CE SUBI R28,0x1E
32 40D0 SBCI R29,0
33 EA0A LDI R16,0xAA
34 8308 STD Y+0,R16
35 2400 CLR R0
36 E6E5 LDI R30,0x65
37 E0F0 LDI R31,0
38 E010 LDI R17,0
39 38EE CPI R30,0x8E
3A 07F1 CPC R31,R17
3B F011 BEQ 0x003E
3C 9201 ST R0,Z+
3D CFFB RJMP 0x0039
3E 8300 STD Z+0,R16
3F E5E4 LDI R30,0x54
40 E0F0 LDI R31,0
41 E6A0 LDI R26,0x60
42 E0B0 LDI R27,0
43 E010 LDI R17,0
44 E000 LDI R16,0
45 BF0B OUT 0x3B,R16
46 35E9 CPI R30,0x59
47 07F1 CPC R31,R17
48 F021 BEQ 0x004D
49 95C8 LPM
4A 9631 ADIW R30,1
4B 920D ST R0,X+
4C CFF9 RJMP 0x0046
4D 940E 00B5 CALL _main
_exit:
4F CFFF RJMP _exit
_uart_rx_isr:
50 922A ST R2,-Y
51 923A ST R3,-Y
52 938A ST R24,-Y
53 939A ST R25,-Y
54 93EA ST R30,-Y
55 93FA ST R31,-Y
56 B62F IN R2,0x3F
57 922A ST R2,-Y
FILE: D:\MYDOCU~1\EXPRIMENT\ICC\UART\ValidateBaudRate\ValidateBaudRate.c
(0001) //ICC-AVR application builder : 2009-4-7 20:13:28
(0002) // Target : M16
(0003) // Crystal: 16.000Mhz
(0004)
(0005) // Title: ValidateBaudRate.c
(0006) // Operation:
(0007) // 1> This program make echo to PC sending in Baudrate 38400
(0008) // 2> AVR Study Board sends Data"from FF to 00" to PC in the SComAssistant.
(0009) // 3> The display will be showed when the key k7 is pressed.
(0010) // Attention:
(0011) // 1> HEX must be setuped to show in the SComAssistant.
(0012) //
(0013)
(0014) /* UCSRA: Control & Status Register A
(0015) b7-RXC: USART receive complete
(0016) b6-TXC: USART transmit complete
(0017) b5-UDRE: USART Data register empty
(0018) b4-FE: Frame Error
(0019) b3-DOR: Data overtun
(0020) b2-PE: Parity error
(0021) b1-U2X: double the USART transmission speed
(0022) b0-MPCM: multi-processor communication mode
(0023)
(0024) USARB
(0025) * b7-RXCIE: RX complete interrupt enable
(0026) b6-TXCIE: TX complete interrupt enable
(0027) b5-UDRIE: USART data register empty interrupt enable
(0028) * b4-RXEN: Receiver enable
(0029) * b3-TXEN: Transmitter enable
(0030) b2-UCSZ2: chracter size ------->0
(0031) b1-RXB8 receive data bit 8
(0032) b0-TXB8: Transmit data 8
(0033)
(0034) UCSRC
(0035) * b7-URSEL: register select 0/UBRRH, 1/UCSRC
(0036) b6-UMSEL: USART mode select 0/Asyn 1/Synchronous
(0037) b5-UPM1: -------- Parity mode 00/disable, 01 reserved
(0038) b4-UPM0: -------- 10 even, 11 odd
(0039) b3-USBS: stop bit selection 0/1-bit, 1/2-bit
(0040) * b2-UCSZ1 --------> 1
(0041) * b1-UCSZ0 --------> 1
(0042) b0-UCPOL: clock polarity 0 rising XCK edge, 1 falling XCK edge
(0043) */
(0044)
(0045) #define uchar unsigned char
(0046) #define uint unsigned int
(0047) #define K1 0x01 //按键K0与PC0相连 启动键（start)
(0048) #define K0 0x02 //按键K1与PC1相连 调节键（adjust）
(0049) #define K6 BIT(6) //按键K6与PC6相连 休眠键（sleep）
(0050) #define K7 BIT(7) //按键K7与PC7相连 暂停键（pause）
(0051) #define dig0 (1<<6) //推荐用这种形式，简单形象
(0052) #define dig1 (1<<7)
(0053) #define LED PORTD
(0054) #define LED1 PORTA
(0055) #define PressKey (PINC&K7)==0
(0056)
(0057) #include <iom16v.h>
(0058) #include <macros.h>
(0059)
(0060) #pragma interrupt_handler uart_rx_isr: 12//the interrupt of RX finish
(0061)
(0062) unsigned char RecBuf[40],KeyMark=0;
(0063) int rec_head=0, rec_tail=0;
(0064) unsigned char rec_data;
(0065)
(0066) void uart_rx_isr(void)
(0067) {
(0068) RecBuf[rec_head]=UDR;
58 E686 LDI R24,0x66
59 E090 LDI R25,0
5A 91E0 0061 LDS R30,rec_head
5C 91F0 0062 LDS R31,rec_head+1
5E 0FE8 ADD R30,R24
5F 1FF9 ADC R31,R25
60 B02C IN R2,0x0C
61 8220 STD Z+0,R2
(0069) rec_head++;
62 9180 0061 LDS R24,rec_head
64 9190 0062 LDS R25,rec_head+1
66 9601 ADIW R24,1
67 9390 0062 STS rec_head+1,R25
69 9380 0061 STS rec_head,R24
(0070) if(rec_head>=40)
6B 3288 CPI R24,0x28
6C E0E0 LDI R30,0
6D 079E CPC R25,R30
6E F034 BLT 0x0075
(0071) rec_head=0;
6F 2422 CLR R2
70 2433 CLR R3
71 9230 0062 STS rec_head+1,R3
73 9220 0061 STS rec_head,R2
75 9029 LD R2,Y+
76 BE2F OUT 0x3F,R2
77 91F9 LD R31,Y+
78 91E9 LD R30,Y+
79 9199 LD R25,Y+
7A 9189 LD R24,Y+
7B 9039 LD R3,Y+
7C 9029 LD R2,Y+
7D 9518 RETI
(0072) }
(0073)
(0074) void port_init(void)
(0075) {
(0076) DDRA = 0xFF; //set PortA output
_port_init:
7E EF8F LDI R24,0xFF
7F BB8A OUT 0x1A,R24
(0077) DDRB = 0xff; //set PORTB output
80 BB87 OUT 0x17,R24
(0078) DDRC = 0x00; //set PORTC output
81 2422 CLR R2
82 BA24 OUT 0x14,R2
(0079) PORTC = 0xff;
83 BB85 OUT 0x15,R24
(0080) DDRD = 0x7f; //set PD.7 input for RX ？
84 E78F LDI R24,0x7F
85 BB81 OUT 0x11,R24
86 9508 RET
(0081) //PD.0 is RX.
(0082) }
(0083)
(0084) void USART_init(void)
(0085) {
(0086) UCSRB=0x00;
_USART_init:
87 2422 CLR R2
88 B82A OUT 0x0A,R2
(0087) UCSRA=0x00;
89 B82B OUT 0x0B,R2
(0088) UCSRB=0b10011000; //b7: RXCIE enabeled, b4: RXEN enabled, B3: TXEN enabled
8A E988 LDI R24,0x98
8B B98A OUT 0x0A,R24
(0089) UBRRH=0x00; //
8C BC20 OUT 0x20,R2
(0090) //Crystal=16MHx
(0091) //UBRRL=103; //Bausdrate=9600 tested work fine
(0092) //UBRRL=51; //Baudrate=19200 tested work fine
(0093) UBRRL=25; //Baudrate=38400 tested work fine //v7.14版本在这里代码生成器犯低级错误；
8D E189 LDI R24,0x19
8E B989 OUT 0x09,R24
(0094) //eg:in the application bulider,UBRR=25,however,it can bulid UBRR=19.
(0095) //UBRRL=8; //Baurate=115200 tested work fine
(0096) UCSRC=0b10000110; //Asyn, No parity, 1-stop, 8-bit, rising edge
8F E886 LDI R24,0x86
90 BD80 OUT 0x20,R24
(0097) // memset(RecBuf, 0, sizeof(RecBuf));
(0098) rec_head=0;
91 2433 CLR R3
92 9230 0062 STS rec_head+1,R3
94 9220 0061 STS rec_head,R2
(0099) rec_tail=0;
96 9230 0064 STS rec_tail+1,R3
98 9220 0063 STS rec_tail,R2
9A 9508 RET
_delay_ms:
i --> R20
j --> R22
count --> R16
9B 940E 011A CALL push_xgsetF000
(0100) }
(0101)
(0102) void delay_ms(int count)
(0103) {
(0104) int i, j;
(0105) for(i=count; i>0; i--)
9D 01A8 MOVW R20,R16
9E C00B RJMP 0x00AA
(0106) for(j=500; j>0; j--)
9F EF64 LDI R22,0xF4
A0 E071 LDI R23,1
A1 5061 SUBI R22,1
A2 4070 SBCI R23,0
A3 2422 CLR R2
A4 2433 CLR R3
A5 1626 CP R2,R22
A6 0637 CPC R3,R23
A7 F3CC BLT 0x00A1
A8 5041 SUBI R20,1
A9 4050 SBCI R21,0
AA 2422 CLR R2
AB 2433 CLR R3
AC 1624 CP R2,R20
AD 0635 CPC R3,R21
AE F384 BLT 0x009F
AF 940C 011F JMP pop_xgsetF000
(0107) ;
(0108) }
(0109)
(0110) void transmit(unsigned char abyte)
(0111) {
(0112) UDR=abyte;
_transmit:
abyte --> R16
B1 B90C OUT 0x0C,R16
(0113) while(!(UCSRA&0b01000000)) //b6=1 TXE ,it quit when transmission finish.
B2 9B5E SBIS 0x0B,6
B3 CFFE RJMP 0x00B2
B4 9508 RET
(0114) ;
(0115) }
(0116)
(0117) //*****************************************************************
(0118) void main(void)
(0119) {
(0120) // unsigned char outa=0b01010101, outb=0b10101010, outc=0x00, outd=0x00;
(0121) int dswin;
(0122) unsigned char SendData=0;
_main:
dswin --> R10
SendData --> R20
B5 2744 CLR R20
(0123) port_init();
B6 DFC7 RCALL _port_init
(0124) USART_init();
B7 DFCF RCALL _USART_init
(0125) SEI();
B8 9478 BSET 7
B9 C05E RJMP 0x0118
(0126)
(0127) while(1)
(0128) {
(0129) WDR(); //Watchdog reset
BA 95A8 WDR
(0130) if(rec_head!=rec_tail)
BB 9020 0063 LDS R2,rec_tail
BD 9030 0064 LDS R3,rec_tail+1
BF 9040 0061 LDS R4,rec_head
C1 9050 0062 LDS R5,rec_head+1
C3 1442 CP R4,R2
C4 0453 CPC R5,R3
C5 F179 BEQ 0x00F5
(0131) {
(0132) rec_data=RecBuf[rec_tail]; //read data from head and write data at tail
C6 E686 LDI R24,0x66
C7 E090 LDI R25,0
C8 01F1 MOVW R30,R2
C9 0FE8 ADD R30,R24
CA 1FF9 ADC R31,R25
CB 8020 LDD R2,Z+0
CC 9220 0065 STS rec_data,R2
(0133) rec_tail++;
CE 9180 0063 LDS R24,rec_tail
D0 9190 0064 LDS R25,rec_tail+1
D2 9601 ADIW R24,1
D3 9390 0064 STS rec_tail+1,R25
D5 9380 0063 STS rec_tail,R24
(0134) //rec_data=RecBuf[rec_tail++]; //you can amend the sentences above two like that
(0135) //i++; show that first use it,then add it.
(0136) if(rec_tail>=40) //make up circular queue
D7 3288 CPI R24,0x28
D8 E0E0 LDI R30,0
D9 079E CPC R25,R30
DA F034 BLT 0x00E1
(0137) rec_tail=0;
DB 2422 CLR R2
DC 2433 CLR R3
DD 9230 0064 STS rec_tail+1,R3
DF 9220 0063 STS rec_tail,R2
(0138)
(0139) dswin=rec_head<<2; //the lowest 2 bit of PORTD are RXD and TXD.
E1 90A0 0061 LDS R10,rec_head
E3 90B0 0062 LDS R11,rec_head+1
E5 0CAA LSL R10
E6 1CBB ROL R11
E7 0CAA LSL R10
E8 1CBB ROL R11
(0140) PORTD=dswin; //The two ports are occupied,so it need "<<2".
E9 BAA2 OUT 0x12,R10
(0141) PORTA=rec_data; //rec_head++,so it can stand for the number of received data.
EA 9020 0065 LDS R2,rec_data
EC BA2B OUT 0x1B,R2
(0142) transmit(rec_data);
ED 2D02 MOV R16,R2
EE DFC2 RCALL _transmit
(0143) if(rec_data==13) //★??
EF 9180 0065 LDS R24,rec_data
F1 308D CPI R24,0xD
F2 F411 BNE 0x00F5
(0144) transmit(10);
F3 E00A LDI R16,0xA
F4 DFBC RCALL _transmit
(0145) }
(0146) if(PressKey&&!KeyMark) //clamping using state bit
F5 999F SBIC 0x13,7
F6 C00E RJMP 0x0105
F7 9020 0060 LDS R2,KeyMark
F9 2022 TST R2
FA F451 BNE 0x0105
(0147) {
(0148) delay_ms(20);
FB E104 LDI R16,0x14
FC E010 LDI R17,0
FD DF9D RCALL _delay_ms
(0149) if(PressKey)
FE 999F SBIC 0x13,7
FF C012 RJMP 0x0112
(0150) {
(0151) KeyMark=1;
100 E081 LDI R24,1
101 9380 0060 STS KeyMark,R24
(0152) SendData=0xFF;
103 EF4F LDI R20,0xFF
(0153) }
(0154) }
104 C00D RJMP 0x0112
(0155) else if(!PressKey)
105 999F SBIC 0x13,7
106 C003 RJMP 0x010A
107 E061 LDI R22,1
108 E070 LDI R23,0
109 C002 RJMP 0x010C
10A 2766 CLR R22
10B 2777 CLR R23
10C 3060 CPI R22,0
10D 0767 CPC R22,R23
10E F419 BNE 0x0112
(0156) KeyMark=0;
10F 2422 CLR R2
110 9220 0060 STS KeyMark,R2
(0157) // while(PressKey); //clamping using endless loop on conditionZ
(0158) if(SendData)
112 2344 TST R20
113 F021 BEQ 0x0118
(0159) {
(0160) while(!(UCSRA&(1<<UDRE)));
114 9B5D SBIS 0x0B,5
115 CFFE RJMP 0x0114
(0161) UDR=SendData;
116 B94C OUT 0x0C,R20
(0162) SendData--;
FILE: <library>
117 954A DEC R20
118 CFA1 RJMP 0x00BA
119 9508 RET
push_xgsetF000:
11A 937A ST R23,-Y
11B 936A ST R22,-Y
11C 935A ST R21,-Y
11D 934A ST R20,-Y
11E 9508 RET
pop_xgsetF000:
11F 9149 LD R20,Y+
120 9159 LD R21,Y+
121 9169 LD R22,Y+
122 9179 LD R23,Y+
123 9508 RET
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